unicorn/qemu/target/riscv
Richard Henderson dab0061a0d
tcg: Use CPUClass::tlb_fill in cputlb.c
We can now use the CPUClass hook instead of a named function.

Create a static tlb_fill function to avoid other changes within
cputlb.c. This also isolates the asserts within. Remove the
named tlb_fill function from all of the targets.

Backports commit c319dc13579a92937bffe02ad2c9f1a550e73973 from qemu
2019-05-16 17:35:37 -04:00
..
insn_trans decodetree: Add DisasContext argument to !function expanders 2019-05-09 17:40:45 -04:00
cpu_bits.h RISC-V: Fixes to CSR_* register macros. 2019-03-19 23:39:49 -04:00
cpu_helper.c tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
cpu_user.h RISC-V: linux-user support for RVE ABI 2019-03-19 23:58:31 -04:00
cpu.c target/riscv: Convert to CPUClass::tlb_fill 2019-05-16 17:24:01 -04:00
cpu.h target/riscv: Convert to CPUClass::tlb_fill 2019-05-16 17:24:01 -04:00
csr.c RISC-V: Add support for vectored interrupts 2019-03-19 23:58:31 -04:00
fpu_helper.c target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
helper.h target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
insn16.decode target/riscv: Convert quadrant 2 of RVXC insns to decodetree 2019-03-19 04:53:07 -04:00
insn32-64.decode target/riscv: Convert RV64D insns to decodetree 2019-03-18 16:57:16 -04:00
insn32.decode target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists 2019-03-19 05:17:54 -04:00
instmap.h target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
Makefile.objs target/riscv: Convert quadrant 0 of RVXC insns to decodetree 2019-03-19 04:45:53 -04:00
op_helper.c target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
pmp.c riscv: pmp: Log pmp access errors as guest errors 2019-03-19 23:45:03 -04:00
pmp.h Clean up ill-advised or unusual header guards 2019-05-14 08:02:53 -04:00
translate.c decodetree: Add DisasContext argument to !function expanders 2019-05-09 17:40:45 -04:00
unicorn.c target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
unicorn.h target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00