2022-06-30 01:27:49 +02:00
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// SPDX-FileCopyrightText: 2022 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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2021-11-05 15:52:31 +01:00
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#pragma once
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#include <memory>
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#include "common/common_types.h"
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namespace Core {
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class System;
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}
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namespace VideoCore {
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class RasterizerInterface;
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}
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namespace Tegra {
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class GPU;
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namespace Engines {
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class Puller;
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class Fermi2D;
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class Maxwell3D;
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class MaxwellDMA;
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class KeplerCompute;
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class KeplerMemory;
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} // namespace Engines
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class MemoryManager;
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class DmaPusher;
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namespace Control {
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struct ChannelState {
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2022-09-01 05:45:22 +02:00
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explicit ChannelState(s32 bind_id);
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2021-11-05 15:52:31 +01:00
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ChannelState(const ChannelState& state) = delete;
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ChannelState& operator=(const ChannelState&) = delete;
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ChannelState(ChannelState&& other) noexcept = default;
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ChannelState& operator=(ChannelState&& other) noexcept = default;
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void Init(Core::System& system, GPU& gpu);
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void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
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s32 bind_id = -1;
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/// 3D engine
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std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
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/// 2D engine
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std::unique_ptr<Engines::Fermi2D> fermi_2d;
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/// Compute engine
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std::unique_ptr<Engines::KeplerCompute> kepler_compute;
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/// DMA engine
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std::unique_ptr<Engines::MaxwellDMA> maxwell_dma;
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/// Inline memory engine
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std::unique_ptr<Engines::KeplerMemory> kepler_memory;
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std::shared_ptr<MemoryManager> memory_manager;
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std::unique_ptr<DmaPusher> dma_pusher;
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2022-09-01 05:45:22 +02:00
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bool initialized{};
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2021-11-05 15:52:31 +01:00
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};
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} // namespace Control
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} // namespace Tegra
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