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ARM: add ClearInstructionCache function

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This commit is contained in:
wwylele 2016-06-27 21:38:49 +03:00
parent b2df959733
commit 2161f52661
3 changed files with 11 additions and 0 deletions
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3
src/core/arm/arm_interface.h
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@ -32,6 +32,9 @@ public:
Run(1); Run(1);
} }
/// Clear all instruction cache
virtual void ClearInstructionCache() = 0;
/** /**
* Set the Program Counter to an address * Set the Program Counter to an address
* @param addr Address to set PC to * @param addr Address to set PC to

6
src/core/arm/dyncom/arm_dyncom.cpp
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@ -12,6 +12,7 @@
#include "core/arm/dyncom/arm_dyncom.h" #include "core/arm/dyncom/arm_dyncom.h"
#include "core/arm/dyncom/arm_dyncom_interpreter.h" #include "core/arm/dyncom/arm_dyncom_interpreter.h"
#include "core/arm/dyncom/arm_dyncom_run.h" #include "core/arm/dyncom/arm_dyncom_run.h"
#include "core/arm/dyncom/arm_dyncom_trans.h"
#include "core/core.h" #include "core/core.h"
#include "core/core_timing.h" #include "core/core_timing.h"
@ -23,6 +24,11 @@ ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) {
ARM_DynCom::~ARM_DynCom() { ARM_DynCom::~ARM_DynCom() {
} }
void ARM_DynCom::ClearInstructionCache() {
state->instruction_cache.clear();
trans_cache_buf_top = 0;
}
void ARM_DynCom::SetPC(u32 pc) { void ARM_DynCom::SetPC(u32 pc) {
state->Reg[15] = pc; state->Reg[15] = pc;
} }

2
src/core/arm/dyncom/arm_dyncom.h
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@ -21,6 +21,8 @@ public:
ARM_DynCom(PrivilegeMode initial_mode); ARM_DynCom(PrivilegeMode initial_mode);
~ARM_DynCom(); ~ARM_DynCom();
void ClearInstructionCache() override;
void SetPC(u32 pc) override; void SetPC(u32 pc) override;
u32 GetPC() const override; u32 GetPC() const override;
u32 GetReg(int index) const override; u32 GetReg(int index) const override;