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https://github.com/yuzu-emu/yuzu-android.git
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spirv: Fixes and Intel specific workarounds
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704c6f353f
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274897dfd5
@ -25,7 +25,8 @@ void VectorTypes::Define(Sirit::Module& sirit_ctx, Id base_type, std::string_vie
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}
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}
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EmitContext::EmitContext(IR::Program& program) : Sirit::Module(0x00010000) {
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EmitContext::EmitContext(const Profile& profile_, IR::Program& program)
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: Sirit::Module(0x00010000), profile{profile_} {
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AddCapability(spv::Capability::Shader);
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DefineCommonTypes(program.info);
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DefineCommonConstants();
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@ -11,6 +11,7 @@
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#include "shader_recompiler/frontend/ir/program.h"
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#include "shader_recompiler/shader_info.h"
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#include "shader_recompiler/profile.h"
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namespace Shader::Backend::SPIRV {
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@ -30,11 +31,13 @@ private:
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class EmitContext final : public Sirit::Module {
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public:
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explicit EmitContext(IR::Program& program);
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explicit EmitContext(const Profile& profile, IR::Program& program);
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~EmitContext();
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[[nodiscard]] Id Def(const IR::Value& value);
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const Profile& profile;
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Id void_id{};
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Id U1{};
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Id U16{};
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@ -150,11 +150,11 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
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} else if (info.uses_fp16_denorms_flush) {
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if (profile.support_fp16_denorm_flush) {
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ctx.AddCapability(spv::Capability::DenormFlushToZero);
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ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 16U);
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ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormFlushToZero, 16U);
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} else {
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// Same as fp32, no need to warn as most drivers will flush by default
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}
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} else if (info.uses_fp32_denorms_preserve) {
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} else if (info.uses_fp16_denorms_preserve) {
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if (profile.support_fp16_denorm_preserve) {
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ctx.AddCapability(spv::Capability::DenormPreserve);
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ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 16U);
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@ -166,7 +166,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
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} // Anonymous namespace
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std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env, IR::Program& program) {
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EmitContext ctx{program};
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EmitContext ctx{profile, program};
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const Id void_function{ctx.TypeFunction(ctx.void_id)};
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// FIXME: Forward declare functions (needs sirit support)
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Id func{};
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@ -202,10 +202,10 @@ Id EmitUGreaterThan(EmitContext& ctx, Id lhs, Id rhs);
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Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs);
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Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs);
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Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs);
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void EmitLogicalOr(EmitContext& ctx);
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void EmitLogicalAnd(EmitContext& ctx);
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void EmitLogicalXor(EmitContext& ctx);
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void EmitLogicalNot(EmitContext& ctx);
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Id EmitLogicalOr(EmitContext& ctx, Id a, Id b);
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Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b);
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Id EmitLogicalXor(EmitContext& ctx, Id a, Id b);
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Id EmitLogicalNot(EmitContext& ctx, Id value);
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Id EmitConvertS16F16(EmitContext& ctx, Id value);
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Id EmitConvertS16F32(EmitContext& ctx, Id value);
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Id EmitConvertS16F64(EmitContext& ctx, Id value);
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@ -15,6 +15,13 @@ Id Decorate(EmitContext& ctx, IR::Inst* inst, Id op) {
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return op;
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}
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Id Saturate(EmitContext& ctx, Id type, Id value, Id zero, Id one) {
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if (ctx.profile.has_broken_spirv_clamp) {
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return ctx.OpFMin(type, ctx.OpFMax(type, value, zero), one);
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} else {
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return ctx.OpFClamp(type, value, zero, one);
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}
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}
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} // Anonymous namespace
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Id EmitFPAbs16(EmitContext& ctx, Id value) {
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@ -144,19 +151,19 @@ void EmitFPLog2(EmitContext&) {
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Id EmitFPSaturate16(EmitContext& ctx, Id value) {
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const Id zero{ctx.Constant(ctx.F16[1], u16{0})};
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const Id one{ctx.Constant(ctx.F16[1], u16{0x3c00})};
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return ctx.OpFClamp(ctx.F32[1], value, zero, one);
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return Saturate(ctx, ctx.F16[1], value, zero, one);
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}
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Id EmitFPSaturate32(EmitContext& ctx, Id value) {
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const Id zero{ctx.Constant(ctx.F32[1], f32{0.0})};
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const Id one{ctx.Constant(ctx.F32[1], f32{1.0})};
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return ctx.OpFClamp(ctx.F32[1], value, zero, one);
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return Saturate(ctx, ctx.F32[1], value, zero, one);
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}
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Id EmitFPSaturate64(EmitContext& ctx, Id value) {
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const Id zero{ctx.Constant(ctx.F64[1], f64{0.0})};
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const Id one{ctx.Constant(ctx.F64[1], f64{1.0})};
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return ctx.OpFClamp(ctx.F64[1], value, zero, one);
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return Saturate(ctx, ctx.F64[1], value, zero, one);
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}
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Id EmitFPRoundEven16(EmitContext& ctx, Id value) {
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@ -6,20 +6,20 @@
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namespace Shader::Backend::SPIRV {
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void EmitLogicalOr(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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Id EmitLogicalOr(EmitContext& ctx, Id a, Id b) {
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return ctx.OpLogicalOr(ctx.U1, a, b);
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}
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void EmitLogicalAnd(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b) {
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return ctx.OpLogicalAnd(ctx.U1, a, b);
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}
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void EmitLogicalXor(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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Id EmitLogicalXor(EmitContext& ctx, Id a, Id b) {
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return ctx.OpLogicalNotEqual(ctx.U1, a, b);
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}
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void EmitLogicalNot(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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Id EmitLogicalNot(EmitContext& ctx, Id value) {
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return ctx.OpLogicalNot(ctx.U1, value);
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}
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} // namespace Shader::Backend::SPIRV
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@ -272,11 +272,9 @@ public:
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explicit GotoPass(std::span<Block* const> blocks, ObjectPool<Statement>& stmt_pool)
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: pool{stmt_pool} {
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std::vector gotos{BuildUnorderedTreeGetGotos(blocks)};
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fmt::print(stdout, "BEFORE\n{}\n", DumpTree(root_stmt.children));
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for (const Node& goto_stmt : gotos | std::views::reverse) {
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RemoveGoto(goto_stmt);
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}
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fmt::print(stdout, "AFTER\n{}\n", DumpTree(root_stmt.children));
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}
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Statement& RootStatement() noexcept {
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@ -548,7 +546,6 @@ private:
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size_t Offset(ConstNode stmt) const {
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size_t offset{0};
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if (!SearchNode(root_stmt.children, stmt, offset)) {
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fmt::print(stdout, "{}\n", DumpTree(root_stmt.children));
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throw LogicError("Node not found in tree");
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}
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return offset;
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@ -56,7 +56,6 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
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.post_order_blocks{},
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});
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}
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fmt::print(stdout, "{}\n", IR::DumpProgram(program));
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Optimization::LowerFp16ToFp32(program);
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for (IR::Function& function : functions) {
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function.post_order_blocks = PostOrder(function.blocks);
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@ -70,8 +69,6 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
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Optimization::VerificationPass(function);
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}
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Optimization::CollectShaderInfoPass(program);
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fmt::print(stdout, "{}\n", IR::DumpProgram(program));
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return program;
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}
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@ -83,9 +83,12 @@ IR::U32 TranslatorVisitor::GetImm20(u64 insn) {
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BitField<20, 19, u64> value;
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BitField<56, 1, u64> is_negative;
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} const imm{insn};
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const s32 positive_value{static_cast<s32>(imm.value)};
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const s32 value{imm.is_negative != 0 ? -positive_value : positive_value};
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return ir.Imm32(value);
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if (imm.is_negative != 0) {
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const s64 raw{static_cast<s64>(imm.value)};
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return ir.Imm32(static_cast<s32>(-(1LL << 19) + raw));
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} else {
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return ir.Imm32(static_cast<u32>(imm.value));
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}
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}
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IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) {
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@ -94,9 +97,9 @@ IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) {
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BitField<20, 19, u64> value;
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BitField<56, 1, u64> is_negative;
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} const imm{insn};
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const f32 positive_value{Common::BitCast<f32>(static_cast<u32>(imm.value) << 12)};
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const f32 value{imm.is_negative != 0 ? -positive_value : positive_value};
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return ir.Imm32(value);
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const u32 sign_bit{imm.is_negative != 0 ? (1ULL << 31) : 0};
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const u32 value{static_cast<u32>(imm.value) << 12};
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return ir.Imm32(Common::BitCast<f32>(value | sign_bit));
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}
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IR::U32 TranslatorVisitor::GetImm32(u64 insn) {
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@ -15,6 +15,9 @@ struct Profile {
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bool support_fp32_denorm_preserve{};
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bool support_fp16_denorm_flush{};
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bool support_fp32_denorm_flush{};
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// FClamp is broken and OpFMax + OpFMin should be used instead
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bool has_broken_spirv_clamp{};
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};
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} // namespace Shader
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@ -189,6 +189,7 @@ ComputePipeline PipelineCache::CreateComputePipeline(ShaderInfo* shader_info) {
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.support_fp32_denorm_preserve = float_control.shaderDenormPreserveFloat32 != VK_FALSE,
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.support_fp16_denorm_flush = float_control.shaderDenormFlushToZeroFloat16 != VK_FALSE,
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.support_fp32_denorm_flush = float_control.shaderDenormFlushToZeroFloat32 != VK_FALSE,
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.has_broken_spirv_clamp = true, // TODO: is_intel
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};
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const auto [info, code]{Shader::RecompileSPIRV(profile, env, qmd.program_start)};
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/*
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