mirror of
https://github.com/yuzu-emu/yuzu-android.git
synced 2024-11-27 09:44:16 +01:00
Texture Cache: Use vAddr instead of physical memory for caching.
This commit is contained in:
parent
9c0f40a1f5
commit
6ee316cb8f
@ -662,7 +662,7 @@ void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size) {
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return;
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}
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CacheAddr cache_addr = ToCacheAddr(system.Memory().GetPointer(addr));
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texture_cache.FlushRegion(cache_addr, size);
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texture_cache.FlushRegion(addr, size);
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buffer_cache.FlushRegion(cache_addr, size);
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query_cache.FlushRegion(cache_addr, size);
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}
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@ -673,7 +673,7 @@ void RasterizerOpenGL::InvalidateRegion(VAddr addr, u64 size) {
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return;
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}
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CacheAddr cache_addr = ToCacheAddr(system.Memory().GetPointer(addr));
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texture_cache.InvalidateRegion(cache_addr, size);
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texture_cache.InvalidateRegion(addr, size);
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shader_cache.InvalidateRegion(cache_addr, size);
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buffer_cache.InvalidateRegion(cache_addr, size);
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query_cache.InvalidateRegion(cache_addr, size);
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@ -718,8 +718,7 @@ bool RasterizerOpenGL::AccelerateDisplay(const Tegra::FramebufferConfig& config,
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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const auto surface{
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texture_cache.TryFindFramebufferSurface(system.Memory().GetPointer(framebuffer_addr))};
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const auto surface{texture_cache.TryFindFramebufferSurface(framebuffer_addr)};
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if (!surface) {
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return {};
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}
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@ -500,7 +500,7 @@ void RasterizerVulkan::FlushRegion(VAddr addr, u64 size) {
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return;
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}
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CacheAddr cache_addr = ToCacheAddr(system.Memory().GetPointer(addr));
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texture_cache.FlushRegion(cache_addr, size);
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texture_cache.FlushRegion(addr, size);
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buffer_cache.FlushRegion(cache_addr, size);
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query_cache.FlushRegion(cache_addr, size);
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}
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@ -510,7 +510,7 @@ void RasterizerVulkan::InvalidateRegion(VAddr addr, u64 size) {
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return;
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}
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CacheAddr cache_addr = ToCacheAddr(system.Memory().GetPointer(addr));
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texture_cache.InvalidateRegion(cache_addr, size);
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texture_cache.InvalidateRegion(addr, size);
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pipeline_cache.InvalidateRegion(cache_addr, size);
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buffer_cache.InvalidateRegion(cache_addr, size);
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query_cache.InvalidateRegion(cache_addr, size);
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@ -548,8 +548,7 @@ bool RasterizerVulkan::AccelerateDisplay(const Tegra::FramebufferConfig& config,
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return false;
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}
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const u8* host_ptr{system.Memory().GetPointer(framebuffer_addr)};
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const auto surface{texture_cache.TryFindFramebufferSurface(host_ptr)};
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const auto surface{texture_cache.TryFindFramebufferSurface(framebuffer_addr)};
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if (!surface) {
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return false;
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}
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@ -190,22 +190,11 @@ void SurfaceBaseImpl::LoadBuffer(Tegra::MemoryManager& memory_manager,
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MICROPROFILE_SCOPE(GPU_Load_Texture);
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auto& staging_buffer = staging_cache.GetBuffer(0);
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u8* host_ptr;
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is_continuous = memory_manager.IsBlockContinuous(gpu_addr, guest_memory_size);
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// Handle continuouty
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if (is_continuous) {
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// Use physical memory directly
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host_ptr = memory_manager.GetPointer(gpu_addr);
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if (!host_ptr) {
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return;
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}
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} else {
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// Use an extra temporal buffer
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auto& tmp_buffer = staging_cache.GetBuffer(1);
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tmp_buffer.resize(guest_memory_size);
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host_ptr = tmp_buffer.data();
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memory_manager.ReadBlockUnsafe(gpu_addr, host_ptr, guest_memory_size);
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}
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// Use an extra temporal buffer
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auto& tmp_buffer = staging_cache.GetBuffer(1);
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tmp_buffer.resize(guest_memory_size);
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host_ptr = tmp_buffer.data();
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memory_manager.ReadBlockUnsafe(gpu_addr, host_ptr, guest_memory_size);
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if (params.is_tiled) {
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ASSERT_MSG(params.block_width == 0, "Block width is defined as {} on texture target {}",
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@ -257,19 +246,10 @@ void SurfaceBaseImpl::FlushBuffer(Tegra::MemoryManager& memory_manager,
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auto& staging_buffer = staging_cache.GetBuffer(0);
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u8* host_ptr;
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// Handle continuouty
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if (is_continuous) {
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// Use physical memory directly
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host_ptr = memory_manager.GetPointer(gpu_addr);
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if (!host_ptr) {
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return;
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}
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} else {
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// Use an extra temporal buffer
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auto& tmp_buffer = staging_cache.GetBuffer(1);
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tmp_buffer.resize(guest_memory_size);
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host_ptr = tmp_buffer.data();
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}
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// Use an extra temporal buffer
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auto& tmp_buffer = staging_cache.GetBuffer(1);
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tmp_buffer.resize(guest_memory_size);
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host_ptr = tmp_buffer.data();
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if (params.is_tiled) {
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ASSERT_MSG(params.block_width == 0, "Block width is defined as {}", params.block_width);
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@ -300,9 +280,7 @@ void SurfaceBaseImpl::FlushBuffer(Tegra::MemoryManager& memory_manager,
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}
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}
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}
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if (!is_continuous) {
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memory_manager.WriteBlockUnsafe(gpu_addr, host_ptr, guest_memory_size);
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}
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memory_manager.WriteBlockUnsafe(gpu_addr, host_ptr, guest_memory_size);
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}
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} // namespace VideoCommon
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@ -68,8 +68,8 @@ public:
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return gpu_addr;
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}
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bool Overlaps(const CacheAddr start, const CacheAddr end) const {
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return (cache_addr < end) && (cache_addr_end > start);
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bool Overlaps(const VAddr start, const VAddr end) const {
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return (cpu_addr < end) && (cpu_addr_end > start);
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}
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bool IsInside(const GPUVAddr other_start, const GPUVAddr other_end) {
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@ -86,21 +86,13 @@ public:
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return cpu_addr;
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}
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VAddr GetCpuAddrEnd() const {
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return cpu_addr_end;
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}
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void SetCpuAddr(const VAddr new_addr) {
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cpu_addr = new_addr;
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}
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CacheAddr GetCacheAddr() const {
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return cache_addr;
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}
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CacheAddr GetCacheAddrEnd() const {
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return cache_addr_end;
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}
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void SetCacheAddr(const CacheAddr new_addr) {
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cache_addr = new_addr;
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cache_addr_end = new_addr + guest_memory_size;
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cpu_addr_end = new_addr + guest_memory_size;
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}
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const SurfaceParams& GetSurfaceParams() const {
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@ -119,14 +111,6 @@ public:
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return mipmap_sizes[level];
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}
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void MarkAsContinuous(const bool is_continuous) {
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this->is_continuous = is_continuous;
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}
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bool IsContinuous() const {
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return is_continuous;
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}
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bool IsLinear() const {
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return !params.is_tiled;
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}
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@ -175,10 +159,8 @@ protected:
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std::size_t guest_memory_size;
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std::size_t host_memory_size;
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GPUVAddr gpu_addr{};
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CacheAddr cache_addr{};
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CacheAddr cache_addr_end{};
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VAddr cpu_addr{};
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bool is_continuous{};
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VAddr cpu_addr_end{};
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bool is_converted{};
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std::vector<std::size_t> mipmap_sizes;
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@ -52,11 +52,9 @@ using RenderTargetConfig = Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig;
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template <typename TSurface, typename TView>
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class TextureCache {
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using IntervalMap = boost::icl::interval_map<CacheAddr, std::set<TSurface>>;
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using IntervalType = typename IntervalMap::interval_type;
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public:
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void InvalidateRegion(CacheAddr addr, std::size_t size) {
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void InvalidateRegion(VAddr addr, std::size_t size) {
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std::lock_guard lock{mutex};
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for (const auto& surface : GetSurfacesInRegion(addr, size)) {
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@ -76,7 +74,7 @@ public:
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guard_samplers = new_guard;
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}
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void FlushRegion(CacheAddr addr, std::size_t size) {
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void FlushRegion(VAddr addr, std::size_t size) {
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std::lock_guard lock{mutex};
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auto surfaces = GetSurfacesInRegion(addr, size);
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@ -99,9 +97,9 @@ public:
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return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
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}
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const auto host_ptr{system.GPU().MemoryManager().GetPointer(gpu_addr)};
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const auto cache_addr{ToCacheAddr(host_ptr)};
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if (!cache_addr) {
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const std::optional<VAddr> cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
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if (!cpu_addr) {
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return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
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}
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@ -110,7 +108,7 @@ public:
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}
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const auto params{SurfaceParams::CreateForTexture(format_lookup_table, tic, entry)};
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const auto [surface, view] = GetSurface(gpu_addr, cache_addr, params, true, false);
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const auto [surface, view] = GetSurface(gpu_addr, *cpu_addr, params, true, false);
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if (guard_samplers) {
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sampled_textures.push_back(surface);
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}
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@ -124,13 +122,13 @@ public:
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if (!gpu_addr) {
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return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
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}
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const auto host_ptr{system.GPU().MemoryManager().GetPointer(gpu_addr)};
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const auto cache_addr{ToCacheAddr(host_ptr)};
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if (!cache_addr) {
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const std::optional<VAddr> cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
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if (!cpu_addr) {
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return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
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}
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const auto params{SurfaceParams::CreateForImage(format_lookup_table, tic, entry)};
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const auto [surface, view] = GetSurface(gpu_addr, cache_addr, params, true, false);
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const auto [surface, view] = GetSurface(gpu_addr, *cpu_addr, params, true, false);
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if (guard_samplers) {
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sampled_textures.push_back(surface);
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}
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@ -159,14 +157,14 @@ public:
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SetEmptyDepthBuffer();
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return {};
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}
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const auto host_ptr{system.GPU().MemoryManager().GetPointer(gpu_addr)};
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const auto cache_addr{ToCacheAddr(host_ptr)};
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if (!cache_addr) {
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const std::optional<VAddr> cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
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if (!cpu_addr) {
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SetEmptyDepthBuffer();
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return {};
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}
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const auto depth_params{SurfaceParams::CreateForDepthBuffer(system)};
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auto surface_view = GetSurface(gpu_addr, cache_addr, depth_params, preserve_contents, true);
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auto surface_view = GetSurface(gpu_addr, *cpu_addr, depth_params, preserve_contents, true);
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if (depth_buffer.target)
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depth_buffer.target->MarkAsRenderTarget(false, NO_RT);
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depth_buffer.target = surface_view.first;
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@ -199,15 +197,15 @@ public:
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return {};
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}
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const auto host_ptr{system.GPU().MemoryManager().GetPointer(gpu_addr)};
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const auto cache_addr{ToCacheAddr(host_ptr)};
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if (!cache_addr) {
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const std::optional<VAddr> cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
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if (!cpu_addr) {
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SetEmptyColorBuffer(index);
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return {};
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}
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auto surface_view =
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GetSurface(gpu_addr, cache_addr, SurfaceParams::CreateForFramebuffer(system, index),
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GetSurface(gpu_addr, *cpu_addr, SurfaceParams::CreateForFramebuffer(system, index),
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preserve_contents, true);
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if (render_targets[index].target)
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render_targets[index].target->MarkAsRenderTarget(false, NO_RT);
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@ -257,27 +255,26 @@ public:
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const GPUVAddr src_gpu_addr = src_config.Address();
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const GPUVAddr dst_gpu_addr = dst_config.Address();
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DeduceBestBlit(src_params, dst_params, src_gpu_addr, dst_gpu_addr);
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const auto dst_host_ptr{system.GPU().MemoryManager().GetPointer(dst_gpu_addr)};
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const auto dst_cache_addr{ToCacheAddr(dst_host_ptr)};
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const auto src_host_ptr{system.GPU().MemoryManager().GetPointer(src_gpu_addr)};
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const auto src_cache_addr{ToCacheAddr(src_host_ptr)};
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const std::optional<VAddr> dst_cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(dst_gpu_addr);
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const std::optional<VAddr> src_cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(src_gpu_addr);
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std::pair<TSurface, TView> dst_surface =
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GetSurface(dst_gpu_addr, dst_cache_addr, dst_params, true, false);
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GetSurface(dst_gpu_addr, *dst_cpu_addr, dst_params, true, false);
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std::pair<TSurface, TView> src_surface =
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GetSurface(src_gpu_addr, src_cache_addr, src_params, true, false);
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GetSurface(src_gpu_addr, *src_cpu_addr, src_params, true, false);
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ImageBlit(src_surface.second, dst_surface.second, copy_config);
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dst_surface.first->MarkAsModified(true, Tick());
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}
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TSurface TryFindFramebufferSurface(const u8* host_ptr) {
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const CacheAddr cache_addr = ToCacheAddr(host_ptr);
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if (!cache_addr) {
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TSurface TryFindFramebufferSurface(VAddr addr) {
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if (!addr) {
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return nullptr;
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}
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const CacheAddr page = cache_addr >> registry_page_bits;
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const VAddr page = addr >> registry_page_bits;
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std::vector<TSurface>& list = registry[page];
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for (auto& surface : list) {
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if (surface->GetCacheAddr() == cache_addr) {
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if (surface->GetCpuAddr() == addr) {
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return surface;
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}
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}
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@ -338,18 +335,14 @@ protected:
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void Register(TSurface surface) {
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const GPUVAddr gpu_addr = surface->GetGpuAddr();
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const CacheAddr cache_ptr = ToCacheAddr(system.GPU().MemoryManager().GetPointer(gpu_addr));
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const std::size_t size = surface->GetSizeInBytes();
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const std::optional<VAddr> cpu_addr =
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system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
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if (!cache_ptr || !cpu_addr) {
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if (!cpu_addr) {
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LOG_CRITICAL(HW_GPU, "Failed to register surface with unmapped gpu_address 0x{:016x}",
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gpu_addr);
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return;
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}
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const bool continuous = system.GPU().MemoryManager().IsBlockContinuous(gpu_addr, size);
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surface->MarkAsContinuous(continuous);
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surface->SetCacheAddr(cache_ptr);
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surface->SetCpuAddr(*cpu_addr);
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RegisterInnerCache(surface);
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surface->MarkAsRegistered(true);
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@ -634,7 +627,7 @@ private:
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std::optional<std::pair<TSurface, TView>> Manage3DSurfaces(std::vector<TSurface>& overlaps,
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const SurfaceParams& params,
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const GPUVAddr gpu_addr,
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const CacheAddr cache_addr,
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const VAddr cpu_addr,
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bool preserve_contents) {
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if (params.target == SurfaceTarget::Texture3D) {
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bool failed = false;
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@ -659,7 +652,7 @@ private:
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failed = true;
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break;
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}
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const u32 offset = static_cast<u32>(surface->GetCacheAddr() - cache_addr);
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const u32 offset = static_cast<u32>(surface->GetCpuAddr() - cpu_addr);
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const auto [x, y, z] = params.GetBlockOffsetXYZ(offset);
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modified |= surface->IsModified();
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const CopyParams copy_params(0, 0, 0, 0, 0, z, 0, 0, params.width, params.height,
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@ -679,7 +672,7 @@ private:
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} else {
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for (const auto& surface : overlaps) {
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if (!surface->MatchTarget(params.target)) {
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if (overlaps.size() == 1 && surface->GetCacheAddr() == cache_addr) {
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if (overlaps.size() == 1 && surface->GetCpuAddr() == cpu_addr) {
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if (Settings::values.use_accurate_gpu_emulation) {
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return std::nullopt;
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}
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@ -688,7 +681,7 @@ private:
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}
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return std::nullopt;
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}
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if (surface->GetCacheAddr() != cache_addr) {
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if (surface->GetCpuAddr() != cpu_addr) {
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continue;
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}
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if (surface->MatchesStructure(params) == MatchStructureResult::FullMatch) {
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@ -722,13 +715,13 @@ private:
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* left blank.
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* @param is_render Whether or not the surface is a render target.
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**/
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std::pair<TSurface, TView> GetSurface(const GPUVAddr gpu_addr, const CacheAddr cache_addr,
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std::pair<TSurface, TView> GetSurface(const GPUVAddr gpu_addr, const VAddr cpu_addr,
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const SurfaceParams& params, bool preserve_contents,
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bool is_render) {
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// Step 1
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// Check Level 1 Cache for a fast structural match. If candidate surface
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// matches at certain level we are pretty much done.
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if (const auto iter = l1_cache.find(cache_addr); iter != l1_cache.end()) {
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if (const auto iter = l1_cache.find(cpu_addr); iter != l1_cache.end()) {
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TSurface& current_surface = iter->second;
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const auto topological_result = current_surface->MatchesTopology(params);
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if (topological_result != MatchTopologyResult::FullMatch) {
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@ -755,7 +748,7 @@ private:
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// Step 2
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// Obtain all possible overlaps in the memory region
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const std::size_t candidate_size = params.GetGuestSizeInBytes();
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auto overlaps{GetSurfacesInRegion(cache_addr, candidate_size)};
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auto overlaps{GetSurfacesInRegion(cpu_addr, candidate_size)};
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// If none are found, we are done. we just load the surface and create it.
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if (overlaps.empty()) {
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@ -777,7 +770,7 @@ private:
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// Check if it's a 3D texture
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if (params.block_depth > 0) {
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auto surface =
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Manage3DSurfaces(overlaps, params, gpu_addr, cache_addr, preserve_contents);
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Manage3DSurfaces(overlaps, params, gpu_addr, cpu_addr, preserve_contents);
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if (surface) {
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return *surface;
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}
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@ -852,16 +845,16 @@ private:
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* @param params The parameters on the candidate surface.
|
||||
**/
|
||||
Deduction DeduceSurface(const GPUVAddr gpu_addr, const SurfaceParams& params) {
|
||||
const auto host_ptr{system.GPU().MemoryManager().GetPointer(gpu_addr)};
|
||||
const auto cache_addr{ToCacheAddr(host_ptr)};
|
||||
const std::optional<VAddr> cpu_addr =
|
||||
system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
|
||||
|
||||
if (!cache_addr) {
|
||||
if (!cpu_addr) {
|
||||
Deduction result{};
|
||||
result.type = DeductionType::DeductionFailed;
|
||||
return result;
|
||||
}
|
||||
|
||||
if (const auto iter = l1_cache.find(cache_addr); iter != l1_cache.end()) {
|
||||
if (const auto iter = l1_cache.find(*cpu_addr); iter != l1_cache.end()) {
|
||||
TSurface& current_surface = iter->second;
|
||||
const auto topological_result = current_surface->MatchesTopology(params);
|
||||
if (topological_result != MatchTopologyResult::FullMatch) {
|
||||
@ -880,7 +873,7 @@ private:
|
||||
}
|
||||
|
||||
const std::size_t candidate_size = params.GetGuestSizeInBytes();
|
||||
auto overlaps{GetSurfacesInRegion(cache_addr, candidate_size)};
|
||||
auto overlaps{GetSurfacesInRegion(*cpu_addr, candidate_size)};
|
||||
|
||||
if (overlaps.empty()) {
|
||||
Deduction result{};
|
||||
@ -1024,10 +1017,10 @@ private:
|
||||
}
|
||||
|
||||
void RegisterInnerCache(TSurface& surface) {
|
||||
const CacheAddr cache_addr = surface->GetCacheAddr();
|
||||
CacheAddr start = cache_addr >> registry_page_bits;
|
||||
const CacheAddr end = (surface->GetCacheAddrEnd() - 1) >> registry_page_bits;
|
||||
l1_cache[cache_addr] = surface;
|
||||
const VAddr cpu_addr = surface->GetCpuAddr();
|
||||
VAddr start = cpu_addr >> registry_page_bits;
|
||||
const VAddr end = (surface->GetCpuAddrEnd() - 1) >> registry_page_bits;
|
||||
l1_cache[cpu_addr] = surface;
|
||||
while (start <= end) {
|
||||
registry[start].push_back(surface);
|
||||
start++;
|
||||
@ -1035,10 +1028,10 @@ private:
|
||||
}
|
||||
|
||||
void UnregisterInnerCache(TSurface& surface) {
|
||||
const CacheAddr cache_addr = surface->GetCacheAddr();
|
||||
CacheAddr start = cache_addr >> registry_page_bits;
|
||||
const CacheAddr end = (surface->GetCacheAddrEnd() - 1) >> registry_page_bits;
|
||||
l1_cache.erase(cache_addr);
|
||||
const VAddr cpu_addr = surface->GetCpuAddr();
|
||||
VAddr start = cpu_addr >> registry_page_bits;
|
||||
const VAddr end = (surface->GetCpuAddrEnd() - 1) >> registry_page_bits;
|
||||
l1_cache.erase(cpu_addr);
|
||||
while (start <= end) {
|
||||
auto& reg{registry[start]};
|
||||
reg.erase(std::find(reg.begin(), reg.end(), surface));
|
||||
@ -1046,18 +1039,18 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
std::vector<TSurface> GetSurfacesInRegion(const CacheAddr cache_addr, const std::size_t size) {
|
||||
std::vector<TSurface> GetSurfacesInRegion(const VAddr cpu_addr, const std::size_t size) {
|
||||
if (size == 0) {
|
||||
return {};
|
||||
}
|
||||
const CacheAddr cache_addr_end = cache_addr + size;
|
||||
CacheAddr start = cache_addr >> registry_page_bits;
|
||||
const CacheAddr end = (cache_addr_end - 1) >> registry_page_bits;
|
||||
const VAddr cpu_addr_end = cpu_addr + size;
|
||||
VAddr start = cpu_addr >> registry_page_bits;
|
||||
const VAddr end = (cpu_addr_end - 1) >> registry_page_bits;
|
||||
std::vector<TSurface> surfaces;
|
||||
while (start <= end) {
|
||||
std::vector<TSurface>& list = registry[start];
|
||||
for (auto& surface : list) {
|
||||
if (!surface->IsPicked() && surface->Overlaps(cache_addr, cache_addr_end)) {
|
||||
if (!surface->IsPicked() && surface->Overlaps(cpu_addr, cpu_addr_end)) {
|
||||
surface->MarkAsPicked(true);
|
||||
surfaces.push_back(surface);
|
||||
}
|
||||
@ -1146,14 +1139,14 @@ private:
|
||||
// large in size.
|
||||
static constexpr u64 registry_page_bits{20};
|
||||
static constexpr u64 registry_page_size{1 << registry_page_bits};
|
||||
std::unordered_map<CacheAddr, std::vector<TSurface>> registry;
|
||||
std::unordered_map<VAddr, std::vector<TSurface>> registry;
|
||||
|
||||
static constexpr u32 DEPTH_RT = 8;
|
||||
static constexpr u32 NO_RT = 0xFFFFFFFF;
|
||||
|
||||
// The L1 Cache is used for fast texture lookup before checking the overlaps
|
||||
// This avoids calculating size and other stuffs.
|
||||
std::unordered_map<CacheAddr, TSurface> l1_cache;
|
||||
std::unordered_map<VAddr, TSurface> l1_cache;
|
||||
|
||||
/// The surface reserve is a "backup" cache, this is where we put unique surfaces that have
|
||||
/// previously been used. This is to prevent surfaces from being constantly created and
|
||||
|
Loading…
Reference in New Issue
Block a user