mirror of
https://github.com/yuzu-emu/yuzu-android.git
synced 2024-11-30 09:54:22 +01:00
Pica/GPU: Change hardware registers to use physical addresses rather than virtual ones.
This cleans up the mess that address reading/writing had become and makes the code a *lot* more sensible. This adds a physical<->virtual address converter to mem_map.h. For further accuracy, we will want to properly extend this to support a wider range of address regions. For now, this makes simply homebrew applications work in a good manner though.
This commit is contained in:
parent
bd798390d5
commit
7b6a7d7dfb
@ -173,7 +173,7 @@ void ExecuteCommand(const Command& command) {
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case CommandId::SET_COMMAND_LIST_LAST:
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{
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auto& params = command.set_command_list_last;
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.address), params.address >> 3);
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.address), Memory::VirtualToPhysicalAddress(params.address) >> 3);
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.size), params.size >> 3);
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// TODO: Not sure if we are supposed to always write this .. seems to trigger processing though
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@ -193,13 +193,13 @@ void ExecuteCommand(const Command& command) {
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case CommandId::SET_MEMORY_FILL:
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{
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auto& params = command.memory_fill;
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].address_start), params.start1 >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].address_end), params.end1 >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].address_start), Memory::VirtualToPhysicalAddress(params.start1) >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].address_end), Memory::VirtualToPhysicalAddress(params.end1) >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].size), params.end1 - params.start1);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[0].value), params.value1);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_start), params.start2 >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_end), params.end2 >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_start), Memory::VirtualToPhysicalAddress(params.start2) >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_end), Memory::VirtualToPhysicalAddress(params.end2) >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].size), params.end2 - params.start2);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].value), params.value2);
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break;
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@ -208,8 +208,8 @@ void ExecuteCommand(const Command& command) {
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case CommandId::SET_DISPLAY_TRANSFER:
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{
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auto& params = command.image_copy;
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_address), params.in_buffer_address >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_address), params.out_buffer_address >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_address), Memory::VirtualToPhysicalAddress(params.in_buffer_address) >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_address), Memory::VirtualToPhysicalAddress(params.out_buffer_address) >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_size), params.in_buffer_size);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_size), params.out_buffer_size);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags);
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@ -230,8 +230,8 @@ void ExecuteCommand(const Command& command) {
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case CommandId::SET_TEXTURE_COPY:
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{
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auto& params = command.image_copy;
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_address), params.in_buffer_address >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_address), params.out_buffer_address >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_address), Memory::VirtualToPhysicalAddress(params.in_buffer_address) >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_address), Memory::VirtualToPhysicalAddress(params.out_buffer_address) >> 3);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_size), params.in_buffer_size);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_size), params.out_buffer_size);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags);
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@ -24,83 +24,6 @@ Regs g_regs;
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u32 g_cur_line = 0; ///< Current vertical screen line
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u64 g_last_line_ticks = 0; ///< CPU tick count from last vertical screen line
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/**
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* Sets whether the framebuffers are in the GSP heap (FCRAM) or VRAM
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* @param
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*/
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void SetFramebufferLocation(const FramebufferLocation mode) {
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switch (mode) {
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case FRAMEBUFFER_LOCATION_FCRAM:
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{
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auto& framebuffer_top = g_regs.framebuffer_config[0];
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auto& framebuffer_sub = g_regs.framebuffer_config[1];
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framebuffer_top.address_left1 = PADDR_TOP_LEFT_FRAME1;
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framebuffer_top.address_left2 = PADDR_TOP_LEFT_FRAME2;
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framebuffer_top.address_right1 = PADDR_TOP_RIGHT_FRAME1;
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framebuffer_top.address_right2 = PADDR_TOP_RIGHT_FRAME2;
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framebuffer_sub.address_left1 = PADDR_SUB_FRAME1;
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//framebuffer_sub.address_left2 = unknown;
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framebuffer_sub.address_right1 = PADDR_SUB_FRAME2;
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//framebuffer_sub.address_right2 = unknown;
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break;
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}
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case FRAMEBUFFER_LOCATION_VRAM:
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{
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auto& framebuffer_top = g_regs.framebuffer_config[0];
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auto& framebuffer_sub = g_regs.framebuffer_config[1];
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framebuffer_top.address_left1 = PADDR_VRAM_TOP_LEFT_FRAME1;
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framebuffer_top.address_left2 = PADDR_VRAM_TOP_LEFT_FRAME2;
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framebuffer_top.address_right1 = PADDR_VRAM_TOP_RIGHT_FRAME1;
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framebuffer_top.address_right2 = PADDR_VRAM_TOP_RIGHT_FRAME2;
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framebuffer_sub.address_left1 = PADDR_VRAM_SUB_FRAME1;
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//framebuffer_sub.address_left2 = unknown;
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framebuffer_sub.address_right1 = PADDR_VRAM_SUB_FRAME2;
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//framebuffer_sub.address_right2 = unknown;
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break;
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}
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}
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}
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/**
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* Gets the location of the framebuffers
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* @return Location of framebuffers as FramebufferLocation enum
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*/
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FramebufferLocation GetFramebufferLocation(u32 address) {
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if ((address & ~Memory::VRAM_MASK) == Memory::VRAM_PADDR) {
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return FRAMEBUFFER_LOCATION_VRAM;
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} else if ((address & ~Memory::FCRAM_MASK) == Memory::FCRAM_PADDR) {
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return FRAMEBUFFER_LOCATION_FCRAM;
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} else {
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ERROR_LOG(GPU, "unknown framebuffer location!");
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}
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return FRAMEBUFFER_LOCATION_UNKNOWN;
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}
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u32 GetFramebufferAddr(const u32 address) {
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switch (GetFramebufferLocation(address)) {
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case FRAMEBUFFER_LOCATION_FCRAM:
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return Memory::VirtualAddressFromPhysical_FCRAM(address);
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case FRAMEBUFFER_LOCATION_VRAM:
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return Memory::VirtualAddressFromPhysical_VRAM(address);
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default:
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ERROR_LOG(GPU, "unknown framebuffer location");
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}
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return 0;
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}
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/**
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* Gets a read-only pointer to a framebuffer in memory
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* @param address Physical address of framebuffer
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* @return Returns const pointer to raw framebuffer
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*/
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const u8* GetFramebufferPointer(const u32 address) {
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u32 addr = GetFramebufferAddr(address);
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return (addr != 0) ? Memory::GetPointer(addr) : nullptr;
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}
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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u32 addr = raw_addr - 0x1EF00000;
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@ -141,8 +64,8 @@ inline void Write(u32 addr, const T data) {
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// TODO: Not sure if this check should be done at GSP level instead
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if (config.address_start) {
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// TODO: Not sure if this algorithm is correct, particularly because it doesn't use the size member at all
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u32* start = (u32*)Memory::GetPointer(config.GetStartAddress());
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u32* end = (u32*)Memory::GetPointer(config.GetEndAddress());
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u32* start = (u32*)Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetStartAddress()));
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u32* end = (u32*)Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetEndAddress()));
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for (u32* ptr = start; ptr < end; ++ptr)
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*ptr = bswap32(config.value); // TODO: This is just a workaround to missing framebuffer format emulation
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@ -155,8 +78,8 @@ inline void Write(u32 addr, const T data) {
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{
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const auto& config = g_regs.display_transfer_config;
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if (config.trigger & 1) {
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u8* source_pointer = Memory::GetPointer(config.GetPhysicalInputAddress());
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u8* dest_pointer = Memory::GetPointer(config.GetPhysicalOutputAddress());
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u8* source_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalInputAddress()));
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u8* dest_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalOutputAddress()));
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for (int y = 0; y < config.output_height; ++y) {
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// TODO: Why does the register seem to hold twice the framebuffer width?
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@ -276,11 +199,22 @@ void Init() {
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g_cur_line = 0;
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g_last_line_ticks = Core::g_app_core->GetTicks();
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// SetFramebufferLocation(FRAMEBUFFER_LOCATION_FCRAM);
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SetFramebufferLocation(FRAMEBUFFER_LOCATION_VRAM);
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auto& framebuffer_top = g_regs.framebuffer_config[0];
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auto& framebuffer_sub = g_regs.framebuffer_config[1];
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// Setup default framebuffer addresses (located in VRAM)
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// .. or at least these are the ones used by system applets.
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// There's probably a smarter way to come up with addresses
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// like this which does not require hardcoding.
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framebuffer_top.address_left1 = 0x181E6000;
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framebuffer_top.address_left2 = 0x1822C800;
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framebuffer_top.address_right1 = 0x18273000;
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framebuffer_top.address_right2 = 0x182B9800;
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framebuffer_sub.address_left1 = 0x1848F000;
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//framebuffer_sub.address_left2 = unknown;
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framebuffer_sub.address_right1 = 0x184C7800;
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//framebuffer_sub.address_right2 = unknown;
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// TODO: Width should be 240 instead?
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framebuffer_top.width = 480;
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framebuffer_top.height = 400;
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@ -249,72 +249,6 @@ static_assert(sizeof(Regs) == 0x1000 * sizeof(u32), "Invalid total size of regis
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extern Regs g_regs;
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enum {
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TOP_ASPECT_X = 0x5,
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TOP_ASPECT_Y = 0x3,
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TOP_HEIGHT = 240,
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TOP_WIDTH = 400,
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BOTTOM_WIDTH = 320,
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// Physical addresses in FCRAM (chosen arbitrarily)
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PADDR_TOP_LEFT_FRAME1 = 0x201D4C00,
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PADDR_TOP_LEFT_FRAME2 = 0x202D4C00,
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PADDR_TOP_RIGHT_FRAME1 = 0x203D4C00,
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PADDR_TOP_RIGHT_FRAME2 = 0x204D4C00,
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PADDR_SUB_FRAME1 = 0x205D4C00,
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PADDR_SUB_FRAME2 = 0x206D4C00,
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// Physical addresses in FCRAM used by ARM9 applications
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/* PADDR_TOP_LEFT_FRAME1 = 0x20184E60,
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PADDR_TOP_LEFT_FRAME2 = 0x201CB370,
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PADDR_TOP_RIGHT_FRAME1 = 0x20282160,
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PADDR_TOP_RIGHT_FRAME2 = 0x202C8670,
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PADDR_SUB_FRAME1 = 0x202118E0,
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PADDR_SUB_FRAME2 = 0x20249CF0,*/
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// Physical addresses in VRAM
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// TODO: These should just be deduced from the ones above
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PADDR_VRAM_TOP_LEFT_FRAME1 = 0x181D4C00,
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PADDR_VRAM_TOP_LEFT_FRAME2 = 0x182D4C00,
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PADDR_VRAM_TOP_RIGHT_FRAME1 = 0x183D4C00,
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PADDR_VRAM_TOP_RIGHT_FRAME2 = 0x184D4C00,
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PADDR_VRAM_SUB_FRAME1 = 0x185D4C00,
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PADDR_VRAM_SUB_FRAME2 = 0x186D4C00,
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// Physical addresses in VRAM used by ARM9 applications
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/* PADDR_VRAM_TOP_LEFT_FRAME2 = 0x181CB370,
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PADDR_VRAM_TOP_RIGHT_FRAME1 = 0x18282160,
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PADDR_VRAM_TOP_RIGHT_FRAME2 = 0x182C8670,
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PADDR_VRAM_SUB_FRAME1 = 0x182118E0,
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PADDR_VRAM_SUB_FRAME2 = 0x18249CF0,*/
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};
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/// Framebuffer location
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enum FramebufferLocation {
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FRAMEBUFFER_LOCATION_UNKNOWN, ///< Framebuffer location is unknown
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FRAMEBUFFER_LOCATION_FCRAM, ///< Framebuffer is in the GSP heap
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FRAMEBUFFER_LOCATION_VRAM, ///< Framebuffer is in VRAM
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};
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/**
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* Sets whether the framebuffers are in the GSP heap (FCRAM) or VRAM
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* @param
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*/
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void SetFramebufferLocation(const FramebufferLocation mode);
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/**
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* Gets a read-only pointer to a framebuffer in memory
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* @param address Physical address of framebuffer
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* @return Returns const pointer to raw framebuffer
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*/
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const u8* GetFramebufferPointer(const u32 address);
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u32 GetFramebufferAddr(const u32 address);
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/**
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* Gets the location of the framebuffers
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*/
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FramebufferLocation GetFramebufferLocation(u32 address);
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template <typename T>
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void Read(T &var, const u32 addr);
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@ -14,7 +14,6 @@ namespace Memory {
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enum {
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BOOTROM_SIZE = 0x00010000, ///< Bootrom (super secret code/data @ 0x8000) size
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MPCORE_PRIV_SIZE = 0x00002000, ///< MPCore private memory region size
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VRAM_SIZE = 0x00600000, ///< VRAM size
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DSP_SIZE = 0x00080000, ///< DSP memory size
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AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size
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@ -23,8 +22,6 @@ enum {
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FCRAM_PADDR_END = (FCRAM_PADDR + FCRAM_SIZE), ///< FCRAM end of physical space
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FCRAM_VADDR = 0x08000000, ///< FCRAM virtual address
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FCRAM_VADDR_END = (FCRAM_VADDR + FCRAM_SIZE), ///< FCRAM end of virtual space
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FCRAM_VADDR_FW0B = 0xF0000000, ///< FCRAM adress for firmare FW0B
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FCRAM_VADDR_FW0B_END = (FCRAM_VADDR_FW0B + FCRAM_SIZE), ///< FCRAM adress end for FW0B
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FCRAM_MASK = (FCRAM_SIZE - 1), ///< FCRAM mask
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SHARED_MEMORY_SIZE = 0x04000000, ///< Shared memory size
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@ -73,6 +70,7 @@ enum {
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HARDWARE_IO_PADDR_END = (HARDWARE_IO_PADDR + HARDWARE_IO_SIZE),
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HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE),
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VRAM_SIZE = 0x00600000,
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VRAM_PADDR = 0x18000000,
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VRAM_VADDR = 0x1F000000,
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VRAM_PADDR_END = (VRAM_PADDR + VRAM_SIZE),
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@ -147,7 +145,7 @@ void Write32(const u32 addr, const u32 data);
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void WriteBlock(const u32 addr, const u8* data, const int size);
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u8* GetPointer(const u32 Address);
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u8* GetPointer(const u32 virtual_address);
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/**
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* Maps a block of memory on the heap
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@ -169,16 +167,10 @@ inline const char* GetCharPointer(const u32 address) {
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return (const char *)GetPointer(address);
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}
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inline const u32 VirtualAddressFromPhysical_FCRAM(const u32 address) {
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return ((address & FCRAM_MASK) | FCRAM_VADDR);
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}
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/// Converts a physical address to virtual address
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u32 PhysicalToVirtualAddress(const u32 addr);
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inline const u32 VirtualAddressFromPhysical_IO(const u32 address) {
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return (address + 0x0EB00000);
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}
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inline const u32 VirtualAddressFromPhysical_VRAM(const u32 address) {
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return (address + 0x07000000);
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}
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/// Converts a virtual address to physical address
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u32 VirtualToPhysicalAddress(const u32 addr);
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} // namespace
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@ -17,37 +17,44 @@ std::map<u32, MemoryBlock> g_heap_map;
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std::map<u32, MemoryBlock> g_heap_gsp_map;
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std::map<u32, MemoryBlock> g_shared_map;
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/// Convert a physical address (or firmware-specific virtual address) to primary virtual address
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u32 _VirtualAddress(const u32 addr) {
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/// Convert a physical address to virtual address
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u32 PhysicalToVirtualAddress(const u32 addr) {
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// Our memory interface read/write functions assume virtual addresses. Put any physical address
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// to virtual address translations here. This is obviously quite hacky... But we're not doing
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// any MMU emulation yet or anything
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if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
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return VirtualAddressFromPhysical_FCRAM(addr);
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// Virtual address mapping FW0B
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} else if ((addr >= FCRAM_VADDR_FW0B) && (addr < FCRAM_VADDR_FW0B_END)) {
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return VirtualAddressFromPhysical_FCRAM(addr);
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// Hardware IO
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// TODO(bunnei): FixMe
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// This isn't going to work... The physical address of HARDWARE_IO conflicts with the virtual
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// address of shared memory.
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//} else if ((addr >= HARDWARE_IO_PADDR) && (addr < HARDWARE_IO_PADDR_END)) {
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// return (addr + 0x0EB00000);
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// to virtual address translations here. This is quite hacky, but necessary until we implement
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// proper MMU emulation.
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// TODO: Screw it, I'll let bunnei figure out how to do this properly.
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if ((addr >= VRAM_PADDR) && (addr < VRAM_PADDR_END)) {
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return addr - VRAM_PADDR + VRAM_VADDR;
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}else if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
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return addr - FCRAM_PADDR + FCRAM_VADDR;
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}
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ERROR_LOG(MEMMAP, "Unknown physical address @ 0x%08x", addr);
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return addr;
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}
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/// Convert a physical address to virtual address
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u32 VirtualToPhysicalAddress(const u32 addr) {
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// Our memory interface read/write functions assume virtual addresses. Put any physical address
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// to virtual address translations here. This is quite hacky, but necessary until we implement
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// proper MMU emulation.
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// TODO: Screw it, I'll let bunnei figure out how to do this properly.
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if ((addr >= VRAM_VADDR) && (addr < VRAM_VADDR_END)) {
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return addr - 0x07000000;
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} else if ((addr >= FCRAM_VADDR) && (addr < FCRAM_VADDR_END)) {
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return addr - FCRAM_VADDR + FCRAM_PADDR;
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}
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ERROR_LOG(MEMMAP, "Unknown virtual address @ 0x%08x", addr);
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return addr;
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}
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template <typename T>
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inline void Read(T &var, const u32 addr) {
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inline void Read(T &var, const u32 vaddr) {
|
||||
// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
|
||||
// TODO: Make sure this represents the mirrors in a correct way.
|
||||
// Could just do a base-relative read, too.... TODO
|
||||
|
||||
const u32 vaddr = _VirtualAddress(addr);
|
||||
|
||||
// Kernel memory command buffer
|
||||
if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
|
||||
var = *((const T*)&g_kernel_mem[vaddr & KERNEL_MEMORY_MASK]);
|
||||
@ -91,8 +98,7 @@ inline void Read(T &var, const u32 addr) {
|
||||
}
|
||||
|
||||
template <typename T>
|
||||
inline void Write(u32 addr, const T data) {
|
||||
u32 vaddr = _VirtualAddress(addr);
|
||||
inline void Write(u32 vaddr, const T data) {
|
||||
|
||||
// Kernel memory command buffer
|
||||
if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
|
||||
@ -140,9 +146,7 @@ inline void Write(u32 addr, const T data) {
|
||||
}
|
||||
}
|
||||
|
||||
u8 *GetPointer(const u32 addr) {
|
||||
const u32 vaddr = _VirtualAddress(addr);
|
||||
|
||||
u8 *GetPointer(const u32 vaddr) {
|
||||
// Kernel memory command buffer
|
||||
if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
|
||||
return g_kernel_mem + (vaddr & KERNEL_MEMORY_MASK);
|
||||
|
@ -45,7 +45,7 @@ struct Regs {
|
||||
INSERT_PADDING_WORDS(0x41);
|
||||
|
||||
BitField<0, 24, u32> viewport_size_x;
|
||||
INSERT_PADDING_WORDS(1);
|
||||
INSERT_PADDING_WORDS(0x1);
|
||||
BitField<0, 24, u32> viewport_size_y;
|
||||
|
||||
INSERT_PADDING_WORDS(0x1bc);
|
||||
|
@ -81,20 +81,20 @@ void RendererOpenGL::RenderXFB(const common::Rect& src_rect, const common::Rect&
|
||||
const auto& framebuffer_top = GPU::g_regs.framebuffer_config[0];
|
||||
const auto& framebuffer_sub = GPU::g_regs.framebuffer_config[1];
|
||||
const u32 active_fb_top = (framebuffer_top.active_fb == 1)
|
||||
? framebuffer_top.address_left2
|
||||
: framebuffer_top.address_left1;
|
||||
? Memory::PhysicalToVirtualAddress(framebuffer_top.address_left2)
|
||||
: Memory::PhysicalToVirtualAddress(framebuffer_top.address_left1);
|
||||
const u32 active_fb_sub = (framebuffer_sub.active_fb == 1)
|
||||
? framebuffer_sub.address_left2
|
||||
: framebuffer_sub.address_left1;
|
||||
? Memory::PhysicalToVirtualAddress(framebuffer_sub.address_left2)
|
||||
: Memory::PhysicalToVirtualAddress(framebuffer_sub.address_left1);
|
||||
|
||||
DEBUG_LOG(GPU, "RenderXFB: 0x%08x bytes from 0x%08x(%dx%d), fmt %x",
|
||||
framebuffer_top.stride * framebuffer_top.height,
|
||||
GPU::GetFramebufferAddr(active_fb_top), (int)framebuffer_top.width,
|
||||
active_fb_top, (int)framebuffer_top.width,
|
||||
(int)framebuffer_top.height, (int)framebuffer_top.format);
|
||||
|
||||
// TODO: This should consider the GPU registers for framebuffer width, height and stride.
|
||||
FlipFramebuffer(GPU::GetFramebufferPointer(active_fb_top), m_xfb_top_flipped);
|
||||
FlipFramebuffer(GPU::GetFramebufferPointer(active_fb_sub), m_xfb_bottom_flipped);
|
||||
FlipFramebuffer(Memory::GetPointer(active_fb_top), m_xfb_top_flipped);
|
||||
FlipFramebuffer(Memory::GetPointer(active_fb_sub), m_xfb_bottom_flipped);
|
||||
|
||||
// Blit the top framebuffer
|
||||
// ------------------------
|
||||
|
Loading…
Reference in New Issue
Block a user