mirror of
https://github.com/yuzu-emu/yuzu-android.git
synced 2024-11-29 14:14:17 +01:00
ARM: Update Dynarmic and Setup A32 according to latest interface.
This commit is contained in:
parent
22ceaca2f4
commit
b8df61c642
2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
@ -1 +1 @@
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Subproject commit 3a50d444dcb66c868528dd12057f63dc623d09a5
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Subproject commit b759773b3b76c62200ecd4e097ec6ecfd825aacb
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@ -9,6 +9,14 @@ add_library(core STATIC
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arm/arm_interface.cpp
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arm/arm_interface.cpp
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arm/cpu_interrupt_handler.cpp
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arm/cpu_interrupt_handler.cpp
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arm/cpu_interrupt_handler.h
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arm/cpu_interrupt_handler.h
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arm/dynarmic/arm_dynarmic_32.cpp
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arm/dynarmic/arm_dynarmic_32.h
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arm/dynarmic/arm_dynarmic_64.cpp
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arm/dynarmic/arm_dynarmic_64.h
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arm/dynarmic/arm_dynarmic_cp15.cpp
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arm/dynarmic/arm_dynarmic_cp15.h
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arm/dynarmic/arm_exclusive_monitor.cpp
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arm/dynarmic/arm_exclusive_monitor.h
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arm/exclusive_monitor.cpp
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arm/exclusive_monitor.cpp
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arm/exclusive_monitor.h
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arm/exclusive_monitor.h
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arm/unicorn/arm_unicorn.cpp
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arm/unicorn/arm_unicorn.cpp
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@ -7,14 +7,17 @@
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#include <dynarmic/A32/a32.h>
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#include <dynarmic/A32/a32.h>
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#include <dynarmic/A32/config.h>
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#include <dynarmic/A32/config.h>
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#include <dynarmic/A32/context.h>
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#include <dynarmic/A32/context.h>
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#include "common/logging/log.h"
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#include "common/page_table.h"
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#include "core/arm/cpu_interrupt_handler.h"
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#include "core/arm/cpu_interrupt_handler.h"
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#include "core/arm/dynarmic/arm_dynarmic_32.h"
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#include "core/arm/dynarmic/arm_dynarmic_32.h"
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#include "core/arm/dynarmic/arm_dynarmic_64.h"
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#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
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#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
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#include "core/arm/dynarmic/arm_exclusive_monitor.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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#include "core/hle/kernel/svc.h"
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#include "core/hle/kernel/svc.h"
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#include "core/memory.h"
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#include "core/memory.h"
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#include "core/settings.h"
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namespace Core {
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namespace Core {
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@ -48,6 +51,19 @@ public:
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parent.system.Memory().Write64(vaddr, value);
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parent.system.Memory().Write64(vaddr, value);
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}
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}
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bool MemoryWriteExclusive8(u32 vaddr, u8 value, u8 expected) override {
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return parent.system.Memory().WriteExclusive8(vaddr, value, expected);
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}
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bool MemoryWriteExclusive16(u32 vaddr, u16 value, u16 expected) override {
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return parent.system.Memory().WriteExclusive16(vaddr, value, expected);
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}
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bool MemoryWriteExclusive32(u32 vaddr, u32 value, u32 expected) override {
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return parent.system.Memory().WriteExclusive32(vaddr, value, expected);
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}
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bool MemoryWriteExclusive64(u32 vaddr, u64 value, u64 expected) override {
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return parent.system.Memory().WriteExclusive64(vaddr, value, expected);
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}
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void InterpreterFallback(u32 pc, std::size_t num_instructions) override {
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void InterpreterFallback(u32 pc, std::size_t num_instructions) override {
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UNIMPLEMENTED_MSG("This should never happen, pc = {:08X}, code = {:08X}", pc,
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UNIMPLEMENTED_MSG("This should never happen, pc = {:08X}, code = {:08X}", pc,
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MemoryReadCode(pc));
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MemoryReadCode(pc));
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@ -110,6 +126,27 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable&
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// config.page_table = &page_table.pointers;
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// config.page_table = &page_table.pointers;
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config.coprocessors[15] = cp15;
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config.coprocessors[15] = cp15;
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config.define_unpredictable_behaviour = true;
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config.define_unpredictable_behaviour = true;
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static constexpr std::size_t PAGE_BITS = 12;
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static constexpr std::size_t NUM_PAGE_TABLE_ENTRIES = 1 << (32 - PAGE_BITS);
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config.page_table = reinterpret_cast<std::array<std::uint8_t*, NUM_PAGE_TABLE_ENTRIES>*>(
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page_table.pointers.data());
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config.absolute_offset_page_table = true;
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config.detect_misaligned_access_via_page_table = 16 | 32 | 64 | 128;
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config.only_detect_misalignment_via_page_table_on_page_boundary = true;
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// Multi-process state
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config.processor_id = core_index;
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config.global_monitor = &exclusive_monitor.monitor;
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// Timing
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config.wall_clock_cntpct = uses_wall_clock;
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// Optimizations
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if (Settings::values.disable_cpu_opt) {
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config.enable_optimizations = false;
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config.enable_fast_dispatch = false;
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}
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return std::make_unique<Dynarmic::A32::Jit>(config);
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return std::make_unique<Dynarmic::A32::Jit>(config);
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}
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}
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@ -178,7 +215,7 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
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}
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}
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void ARM_Dynarmic_32::ChangeProcessorId(std::size_t new_core_id) {
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void ARM_Dynarmic_32::ChangeProcessorId(std::size_t new_core_id) {
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// jit->ChangeProcessorId(new_core_id);
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jit->ChangeProcessorID(new_core_id);
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}
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}
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void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
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void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
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@ -9,7 +9,7 @@
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#include <dynarmic/A32/a32.h>
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#include <dynarmic/A32/a32.h>
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#include <dynarmic/A64/a64.h>
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#include <dynarmic/A64/a64.h>
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#include <dynarmic/A64/exclusive_monitor.h>
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#include <dynarmic/exclusive_monitor.h>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "common/hash.h"
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#include "common/hash.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/arm_interface.h"
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@ -10,6 +10,7 @@
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#include "common/page_table.h"
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#include "common/page_table.h"
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#include "core/arm/cpu_interrupt_handler.h"
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#include "core/arm/cpu_interrupt_handler.h"
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#include "core/arm/dynarmic/arm_dynarmic_64.h"
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#include "core/arm/dynarmic/arm_dynarmic_64.h"
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#include "core/arm/dynarmic/arm_exclusive_monitor.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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#include "core/core_timing_util.h"
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#include "core/core_timing_util.h"
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@ -323,68 +324,4 @@ void ARM_Dynarmic_64::PageTableChanged(Common::PageTable& page_table,
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jit_cache.emplace(key, jit);
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jit_cache.emplace(key, jit);
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}
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}
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DynarmicExclusiveMonitor::DynarmicExclusiveMonitor(Memory::Memory& memory, std::size_t core_count)
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: monitor(core_count), memory{memory} {}
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DynarmicExclusiveMonitor::~DynarmicExclusiveMonitor() = default;
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u8 DynarmicExclusiveMonitor::ExclusiveRead8(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u8>(core_index, addr, [&]() -> u8 { return memory.Read8(addr); });
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}
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u16 DynarmicExclusiveMonitor::ExclusiveRead16(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u16>(core_index, addr, [&]() -> u16 { return memory.Read16(addr); });
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}
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u32 DynarmicExclusiveMonitor::ExclusiveRead32(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u32>(core_index, addr, [&]() -> u32 { return memory.Read32(addr); });
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}
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u64 DynarmicExclusiveMonitor::ExclusiveRead64(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u64>(core_index, addr, [&]() -> u64 { return memory.Read64(addr); });
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}
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u128 DynarmicExclusiveMonitor::ExclusiveRead128(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u128>(core_index, addr, [&]() -> u128 {
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u128 result;
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result[0] = memory.Read64(addr);
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result[1] = memory.Read64(addr + 8);
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return result;
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});
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}
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void DynarmicExclusiveMonitor::ClearExclusive() {
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monitor.Clear();
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) {
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return monitor.DoExclusiveOperation<u8>(core_index, vaddr, [&](u8 expected) -> bool {
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return memory.WriteExclusive8(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) {
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return monitor.DoExclusiveOperation<u16>(core_index, vaddr, [&](u16 expected) -> bool {
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return memory.WriteExclusive16(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) {
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return monitor.DoExclusiveOperation<u32>(core_index, vaddr, [&](u32 expected) -> bool {
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return memory.WriteExclusive32(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) {
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return monitor.DoExclusiveOperation<u64>(core_index, vaddr, [&](u64 expected) -> bool {
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return memory.WriteExclusive64(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) {
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return monitor.DoExclusiveOperation<u128>(core_index, vaddr, [&](u128 expected) -> bool {
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return memory.WriteExclusive128(vaddr, value, expected);
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});
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}
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} // namespace Core
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} // namespace Core
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@ -8,7 +8,6 @@
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#include <unordered_map>
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#include <unordered_map>
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#include <dynarmic/A64/a64.h>
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#include <dynarmic/A64/a64.h>
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#include <dynarmic/A64/exclusive_monitor.h>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "common/hash.h"
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#include "common/hash.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/arm_interface.h"
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@ -78,28 +77,4 @@ private:
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DynarmicExclusiveMonitor& exclusive_monitor;
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DynarmicExclusiveMonitor& exclusive_monitor;
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};
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};
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class DynarmicExclusiveMonitor final : public ExclusiveMonitor {
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public:
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explicit DynarmicExclusiveMonitor(Memory::Memory& memory, std::size_t core_count);
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~DynarmicExclusiveMonitor() override;
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u8 ExclusiveRead8(std::size_t core_index, VAddr addr) override;
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u16 ExclusiveRead16(std::size_t core_index, VAddr addr) override;
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u32 ExclusiveRead32(std::size_t core_index, VAddr addr) override;
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u64 ExclusiveRead64(std::size_t core_index, VAddr addr) override;
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u128 ExclusiveRead128(std::size_t core_index, VAddr addr) override;
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void ClearExclusive() override;
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bool ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) override;
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bool ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) override;
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bool ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) override;
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bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) override;
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bool ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) override;
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private:
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friend class ARM_Dynarmic_64;
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Dynarmic::A64::ExclusiveMonitor monitor;
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Core::Memory::Memory& memory;
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};
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} // namespace Core
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} // namespace Core
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76
src/core/arm/dynarmic/arm_exclusive_monitor.cpp
Normal file
76
src/core/arm/dynarmic/arm_exclusive_monitor.cpp
Normal file
@ -0,0 +1,76 @@
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// Copyright 2018 yuzu emulator team
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <cinttypes>
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#include <memory>
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#include "core/arm/dynarmic/arm_exclusive_monitor.h"
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#include "core/memory.h"
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namespace Core {
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DynarmicExclusiveMonitor::DynarmicExclusiveMonitor(Memory::Memory& memory, std::size_t core_count)
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: monitor(core_count), memory{memory} {}
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DynarmicExclusiveMonitor::~DynarmicExclusiveMonitor() = default;
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u8 DynarmicExclusiveMonitor::ExclusiveRead8(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u8>(core_index, addr, [&]() -> u8 { return memory.Read8(addr); });
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}
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u16 DynarmicExclusiveMonitor::ExclusiveRead16(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u16>(core_index, addr, [&]() -> u16 { return memory.Read16(addr); });
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}
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u32 DynarmicExclusiveMonitor::ExclusiveRead32(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u32>(core_index, addr, [&]() -> u32 { return memory.Read32(addr); });
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}
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u64 DynarmicExclusiveMonitor::ExclusiveRead64(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u64>(core_index, addr, [&]() -> u64 { return memory.Read64(addr); });
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}
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u128 DynarmicExclusiveMonitor::ExclusiveRead128(std::size_t core_index, VAddr addr) {
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return monitor.ReadAndMark<u128>(core_index, addr, [&]() -> u128 {
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u128 result;
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result[0] = memory.Read64(addr);
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result[1] = memory.Read64(addr + 8);
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return result;
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});
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}
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void DynarmicExclusiveMonitor::ClearExclusive() {
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monitor.Clear();
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) {
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return monitor.DoExclusiveOperation<u8>(core_index, vaddr, [&](u8 expected) -> bool {
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return memory.WriteExclusive8(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) {
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return monitor.DoExclusiveOperation<u16>(core_index, vaddr, [&](u16 expected) -> bool {
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return memory.WriteExclusive16(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) {
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return monitor.DoExclusiveOperation<u32>(core_index, vaddr, [&](u32 expected) -> bool {
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return memory.WriteExclusive32(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) {
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return monitor.DoExclusiveOperation<u64>(core_index, vaddr, [&](u64 expected) -> bool {
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return memory.WriteExclusive64(vaddr, value, expected);
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});
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}
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bool DynarmicExclusiveMonitor::ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) {
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return monitor.DoExclusiveOperation<u128>(core_index, vaddr, [&](u128 expected) -> bool {
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return memory.WriteExclusive128(vaddr, value, expected);
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});
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}
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} // namespace Core
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48
src/core/arm/dynarmic/arm_exclusive_monitor.h
Normal file
48
src/core/arm/dynarmic/arm_exclusive_monitor.h
Normal file
@ -0,0 +1,48 @@
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|
// Copyright 2020 yuzu emulator team
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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|
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|
#pragma once
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|
|
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|
#include <memory>
|
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|
#include <unordered_map>
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|
|
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|
#include <dynarmic/exclusive_monitor.h>
|
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|
|
||||||
|
#include "common/common_types.h"
|
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|
#include "core/arm/dynarmic/arm_dynarmic_32.h"
|
||||||
|
#include "core/arm/dynarmic/arm_dynarmic_64.h"
|
||||||
|
#include "core/arm/exclusive_monitor.h"
|
||||||
|
|
||||||
|
namespace Core::Memory {
|
||||||
|
class Memory;
|
||||||
|
}
|
||||||
|
|
||||||
|
namespace Core {
|
||||||
|
|
||||||
|
class DynarmicExclusiveMonitor final : public ExclusiveMonitor {
|
||||||
|
public:
|
||||||
|
explicit DynarmicExclusiveMonitor(Memory::Memory& memory, std::size_t core_count);
|
||||||
|
~DynarmicExclusiveMonitor() override;
|
||||||
|
|
||||||
|
u8 ExclusiveRead8(std::size_t core_index, VAddr addr) override;
|
||||||
|
u16 ExclusiveRead16(std::size_t core_index, VAddr addr) override;
|
||||||
|
u32 ExclusiveRead32(std::size_t core_index, VAddr addr) override;
|
||||||
|
u64 ExclusiveRead64(std::size_t core_index, VAddr addr) override;
|
||||||
|
u128 ExclusiveRead128(std::size_t core_index, VAddr addr) override;
|
||||||
|
void ClearExclusive() override;
|
||||||
|
|
||||||
|
bool ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) override;
|
||||||
|
bool ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) override;
|
||||||
|
bool ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) override;
|
||||||
|
bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) override;
|
||||||
|
bool ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) override;
|
||||||
|
|
||||||
|
private:
|
||||||
|
friend class ARM_Dynarmic_32;
|
||||||
|
friend class ARM_Dynarmic_64;
|
||||||
|
Dynarmic::ExclusiveMonitor monitor;
|
||||||
|
Core::Memory::Memory& memory;
|
||||||
|
};
|
||||||
|
|
||||||
|
} // namespace Core
|
@ -3,7 +3,7 @@
|
|||||||
// Refer to the license.txt file included.
|
// Refer to the license.txt file included.
|
||||||
|
|
||||||
#ifdef ARCHITECTURE_x86_64
|
#ifdef ARCHITECTURE_x86_64
|
||||||
#include "core/arm/dynarmic/arm_dynarmic_64.h"
|
#include "core/arm/dynarmic/arm_exclusive_monitor.h"
|
||||||
#endif
|
#endif
|
||||||
#include "core/arm/exclusive_monitor.h"
|
#include "core/arm/exclusive_monitor.h"
|
||||||
#include "core/memory.h"
|
#include "core/memory.h"
|
||||||
|
Loading…
Reference in New Issue
Block a user