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gl_shader_decompiler: Implement R2P_IMM
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@ -365,6 +365,11 @@ enum class HalfPrecision : u64 {
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FMZ = 2,
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FMZ = 2,
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};
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};
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enum class R2pMode : u64 {
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Pr = 0,
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Cc = 1,
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};
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enum class IpaInterpMode : u64 {
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enum class IpaInterpMode : u64 {
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Linear = 0,
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Linear = 0,
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Perspective = 1,
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Perspective = 1,
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@ -854,6 +859,12 @@ union Instruction {
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BitField<39, 3, u64> pred39;
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BitField<39, 3, u64> pred39;
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} hsetp2;
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} hsetp2;
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union {
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BitField<40, 1, R2pMode> mode;
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BitField<41, 2, u64> byte;
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BitField<20, 7, u64> immediate_mask;
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} r2p;
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union {
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union {
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BitField<39, 3, u64> pred39;
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BitField<39, 3, u64> pred39;
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BitField<42, 1, u64> neg_pred;
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BitField<42, 1, u64> neg_pred;
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@ -1381,6 +1392,7 @@ public:
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PSETP,
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PSETP,
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PSET,
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PSET,
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CSETP,
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CSETP,
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R2P_IMM,
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XMAD_IMM,
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XMAD_IMM,
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XMAD_CR,
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XMAD_CR,
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XMAD_RC,
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XMAD_RC,
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@ -1410,6 +1422,7 @@ public:
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HalfSetPredicate,
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HalfSetPredicate,
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PredicateSetPredicate,
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PredicateSetPredicate,
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PredicateSetRegister,
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PredicateSetRegister,
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RegisterSetPredicate,
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Conversion,
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Conversion,
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Xmad,
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Xmad,
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Unknown,
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Unknown,
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@ -1647,6 +1660,7 @@ private:
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INST("0101000010001---", Id::PSET, Type::PredicateSetRegister, "PSET"),
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INST("0101000010001---", Id::PSET, Type::PredicateSetRegister, "PSET"),
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INST("0101000010010---", Id::PSETP, Type::PredicateSetPredicate, "PSETP"),
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INST("0101000010010---", Id::PSETP, Type::PredicateSetPredicate, "PSETP"),
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INST("010100001010----", Id::CSETP, Type::PredicateSetPredicate, "CSETP"),
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INST("010100001010----", Id::CSETP, Type::PredicateSetPredicate, "CSETP"),
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INST("0011100-11110---", Id::R2P_IMM, Type::RegisterSetPredicate, "R2P_IMM"),
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INST("0011011-00------", Id::XMAD_IMM, Type::Xmad, "XMAD_IMM"),
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INST("0011011-00------", Id::XMAD_IMM, Type::Xmad, "XMAD_IMM"),
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INST("0100111---------", Id::XMAD_CR, Type::Xmad, "XMAD_CR"),
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INST("0100111---------", Id::XMAD_CR, Type::Xmad, "XMAD_CR"),
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INST("010100010-------", Id::XMAD_RC, Type::Xmad, "XMAD_RC"),
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INST("010100010-------", Id::XMAD_RC, Type::Xmad, "XMAD_RC"),
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@ -3260,6 +3260,34 @@ private:
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}
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}
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break;
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break;
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}
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}
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case OpCode::Type::RegisterSetPredicate: {
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UNIMPLEMENTED_IF(instr.r2p.mode != Tegra::Shader::R2pMode::Pr);
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const std::string apply_mask = [&]() {
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switch (opcode->get().GetId()) {
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case OpCode::Id::R2P_IMM:
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return std::to_string(instr.r2p.immediate_mask);
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default:
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UNREACHABLE();
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}
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}();
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const std::string mask = '(' + regs.GetRegisterAsInteger(instr.gpr8, 0, false) +
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" >> " + std::to_string(instr.r2p.byte) + ')';
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constexpr u64 programmable_preds = 7;
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for (u64 pred = 0; pred < programmable_preds; ++pred) {
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const auto shift = std::to_string(1 << pred);
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shader.AddLine("if ((" + apply_mask + " & " + shift + ") != 0) {");
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++shader.scope;
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SetPredicate(pred, '(' + mask + " & " + shift + ") != 0");
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--shader.scope;
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shader.AddLine('}');
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}
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break;
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}
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case OpCode::Type::FloatSet: {
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case OpCode::Type::FloatSet: {
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const std::string op_a = GetOperandAbsNeg(regs.GetRegisterAsFloat(instr.gpr8),
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const std::string op_a = GetOperandAbsNeg(regs.GetRegisterAsFloat(instr.gpr8),
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instr.fset.abs_a != 0, instr.fset.neg_a != 0);
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instr.fset.abs_a != 0, instr.fset.neg_a != 0);
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