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https://github.com/yuzu-emu/yuzu-android.git
synced 2024-11-28 00:34:21 +01:00
Adapt Bindless to work with AOFFI
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492040bd9c
commit
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@ -67,11 +67,12 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
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const TextureType texture_type{instr.tex_b.texture_type};
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const bool is_array = instr.tex_b.array != 0;
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const bool is_aoffi = instr.tex.UsesMiscMode(TextureMiscMode::AOFFI);
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const bool depth_compare = instr.tex_b.UsesMiscMode(TextureMiscMode::DC);
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const auto process_mode = instr.tex_b.GetTextureProcessMode();
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WriteTexInstructionFloat(
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bb, instr,
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GetTexCode(instr, texture_type, process_mode, depth_compare, is_array, {instr.gpr20}));
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WriteTexInstructionFloat(bb, instr,
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GetTexCode(instr, texture_type, process_mode, depth_compare,
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is_array, is_aoffi, {instr.gpr20}));
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break;
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}
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case OpCode::Id::TEXS: {
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@ -384,7 +385,9 @@ void ShaderIR::WriteTexsInstructionHalfFloat(NodeBlock& bb, Instruction instr,
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Node4 ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, std::vector<Node> coords,
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Node array, Node depth_compare, u32 bias_offset, std::vector<Node> aoffi, std::optional<Tegra::Shader::Register> bindless_reg) {
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Node array, Node depth_compare, u32 bias_offset,
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std::vector<Node> aoffi,
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std::optional<Tegra::Shader::Register> bindless_reg) {
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const bool is_array = array;
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const bool is_shadow = depth_compare;
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const bool is_bindless = bindless_reg.has_value();
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@ -451,7 +454,14 @@ Node4 ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
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const bool lod_bias_enabled{
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(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ)};
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const bool is_bindless = bindless_reg.has_value();
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u64 parameter_register = instr.gpr20.Value();
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if (is_bindless) {
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++parameter_register;
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}
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const u32 bias_lod_offset = (is_bindless ? 1 : 0);
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if (lod_bias_enabled) {
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++parameter_register;
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}
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@ -478,7 +488,6 @@ Node4 ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
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if (is_aoffi) {
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aoffi = GetAoffiCoordinates(GetRegister(parameter_register++), coord_count, false);
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}
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const u32 bindless_offset = (is_bindless ? 1 : 0);
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Node dc{};
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if (depth_compare) {
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@ -487,7 +496,8 @@ Node4 ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
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dc = GetRegister(parameter_register++);
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}
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return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, 0, aoffi, bindless_reg);
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return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, bias_lod_offset,
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aoffi, bindless_reg);
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}
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Node4 ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
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@ -523,7 +533,8 @@ Node4 ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
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dc = GetRegister(depth_register);
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}
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return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, bias_offset, {});
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return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, bias_offset, {},
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{});
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}
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Node4 ShaderIR::GetTld4Code(Instruction instr, TextureType texture_type, bool depth_compare,
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