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https://github.com/yuzu-emu/yuzu-android.git
synced 2024-11-24 03:15:41 +01:00
shader_ir/decode: Fix half float pre-operations and remove MetaHalfArithmetic
Operations done before the main half float operation (like HAdd) were managing a packed value instead of the unpacked one. Adding an unpacked operation allows us to drop the per-operand MetaHalfArithmetic entry, simplifying the code overall.
This commit is contained in:
parent
abcbcb1b2a
commit
f43995ec53
@ -121,14 +121,10 @@ std::string GetTopologyName(Tegra::Shader::OutputTopology topology) {
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/// Returns true if an object has to be treated as precise
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/// Returns true if an object has to be treated as precise
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bool IsPrecise(Operation operand) {
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bool IsPrecise(Operation operand) {
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const auto& meta = operand.GetMeta();
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const auto& meta{operand.GetMeta()};
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if (const auto arithmetic = std::get_if<MetaArithmetic>(&meta)) {
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if (const auto arithmetic = std::get_if<MetaArithmetic>(&meta)) {
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return arithmetic->precise;
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return arithmetic->precise;
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}
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}
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if (const auto half_arithmetic = std::get_if<MetaHalfArithmetic>(&meta)) {
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return half_arithmetic->precise;
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}
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return false;
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return false;
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}
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}
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@ -617,26 +613,7 @@ private:
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}
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}
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std::string VisitOperand(Operation operation, std::size_t operand_index, Type type) {
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std::string VisitOperand(Operation operation, std::size_t operand_index, Type type) {
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const std::string value = VisitOperand(operation, operand_index);
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return CastOperand(VisitOperand(operation, operand_index), type);
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switch (type) {
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case Type::HalfFloat: {
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const auto half_meta = std::get_if<MetaHalfArithmetic>(&operation.GetMeta());
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ASSERT(half_meta);
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switch (half_meta->types.at(operand_index)) {
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case Tegra::Shader::HalfType::H0_H1:
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return "toHalf2(" + value + ')';
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case Tegra::Shader::HalfType::F32:
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return "vec2(" + value + ')';
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case Tegra::Shader::HalfType::H0_H0:
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return "vec2(toHalf2(" + value + ")[0])";
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case Tegra::Shader::HalfType::H1_H1:
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return "vec2(toHalf2(" + value + ")[1])";
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}
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}
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default:
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return CastOperand(value, type);
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}
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}
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}
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std::string CastOperand(const std::string& value, Type type) const {
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std::string CastOperand(const std::string& value, Type type) const {
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@ -650,9 +627,7 @@ private:
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case Type::Uint:
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case Type::Uint:
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return "ftou(" + value + ')';
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return "ftou(" + value + ')';
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case Type::HalfFloat:
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case Type::HalfFloat:
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// Can't be handled as a stand-alone value
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return "toHalf2(" + value + ')';
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UNREACHABLE();
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return value;
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}
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}
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UNREACHABLE();
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UNREACHABLE();
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return value;
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return value;
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@ -1073,6 +1048,25 @@ private:
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return ApplyPrecise(operation, BitwiseCastResult(clamped, Type::HalfFloat));
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return ApplyPrecise(operation, BitwiseCastResult(clamped, Type::HalfFloat));
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}
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}
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std::string HUnpack(Operation operation) {
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const std::string operand{VisitOperand(operation, 0, Type::HalfFloat)};
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const auto value = [&]() -> std::string {
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switch (std::get<Tegra::Shader::HalfType>(operation.GetMeta())) {
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case Tegra::Shader::HalfType::H0_H1:
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return operand;
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case Tegra::Shader::HalfType::F32:
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return "vec2(fromHalf2(" + operand + "))";
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case Tegra::Shader::HalfType::H0_H0:
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return "vec2(" + operand + "[0])";
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case Tegra::Shader::HalfType::H1_H1:
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return "vec2(" + operand + "[1])";
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}
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UNREACHABLE();
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return "0";
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}();
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return "fromHalf2(" + value + ')';
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}
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std::string HMergeF32(Operation operation) {
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std::string HMergeF32(Operation operation) {
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return "float(toHalf2(" + Visit(operation[0]) + ")[0])";
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return "float(toHalf2(" + Visit(operation[0]) + ")[0])";
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}
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}
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@ -1508,6 +1502,7 @@ private:
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&GLSLDecompiler::Absolute<Type::HalfFloat>,
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&GLSLDecompiler::Absolute<Type::HalfFloat>,
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&GLSLDecompiler::HNegate,
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&GLSLDecompiler::HNegate,
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&GLSLDecompiler::HClamp,
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&GLSLDecompiler::HClamp,
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&GLSLDecompiler::HUnpack,
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&GLSLDecompiler::HMergeF32,
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&GLSLDecompiler::HMergeF32,
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&GLSLDecompiler::HMergeH0,
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&GLSLDecompiler::HMergeH0,
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&GLSLDecompiler::HMergeH1,
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&GLSLDecompiler::HMergeH1,
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@ -76,14 +76,10 @@ constexpr u32 GetGenericAttributeLocation(Attribute::Index attribute) {
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/// Returns true if an object has to be treated as precise
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/// Returns true if an object has to be treated as precise
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bool IsPrecise(Operation operand) {
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bool IsPrecise(Operation operand) {
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const auto& meta = operand.GetMeta();
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const auto& meta{operand.GetMeta()};
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if (std::holds_alternative<MetaArithmetic>(meta)) {
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if (std::holds_alternative<MetaArithmetic>(meta)) {
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return std::get<MetaArithmetic>(meta).precise;
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return std::get<MetaArithmetic>(meta).precise;
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}
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}
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if (std::holds_alternative<MetaHalfArithmetic>(meta)) {
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return std::get<MetaHalfArithmetic>(meta).precise;
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}
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return false;
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return false;
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}
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}
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@ -749,6 +745,11 @@ private:
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return {};
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return {};
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}
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}
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Id HUnpack(Operation operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id HMergeF32(Operation operation) {
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Id HMergeF32(Operation operation) {
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UNIMPLEMENTED();
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UNIMPLEMENTED();
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return {};
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return {};
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@ -1222,6 +1223,7 @@ private:
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&SPIRVDecompiler::Unary<&Module::OpFAbs, Type::HalfFloat>,
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&SPIRVDecompiler::Unary<&Module::OpFAbs, Type::HalfFloat>,
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&SPIRVDecompiler::HNegate,
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&SPIRVDecompiler::HNegate,
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&SPIRVDecompiler::HClamp,
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&SPIRVDecompiler::HClamp,
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&SPIRVDecompiler::HUnpack,
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&SPIRVDecompiler::HMergeF32,
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&SPIRVDecompiler::HMergeF32,
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&SPIRVDecompiler::HMergeH0,
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&SPIRVDecompiler::HMergeH0,
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&SPIRVDecompiler::HMergeH1,
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&SPIRVDecompiler::HMergeH1,
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@ -29,9 +29,8 @@ u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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const bool negate_b =
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const bool negate_b =
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opcode->get().GetId() != OpCode::Id::HMUL2_C && instr.alu_half.negate_b != 0;
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opcode->get().GetId() != OpCode::Id::HMUL2_C && instr.alu_half.negate_b != 0;
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const Node op_a = GetOperandAbsNegHalf(GetRegister(instr.gpr8), instr.alu_half.abs_a, negate_a);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.alu_half.abs_a, negate_a);
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// instr.alu_half.type_a
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Node op_b = [&]() {
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Node op_b = [&]() {
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switch (opcode->get().GetId()) {
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switch (opcode->get().GetId()) {
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@ -46,17 +45,17 @@ u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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return Immediate(0);
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return Immediate(0);
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}
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}
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}();
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}();
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op_b = UnpackHalfFloat(op_b, instr.alu_half.type_b);
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op_b = GetOperandAbsNegHalf(op_b, instr.alu_half.abs_b, negate_b);
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op_b = GetOperandAbsNegHalf(op_b, instr.alu_half.abs_b, negate_b);
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Node value = [&]() {
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Node value = [&]() {
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MetaHalfArithmetic meta{true, {instr.alu_half_imm.type_a, instr.alu_half.type_b}};
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switch (opcode->get().GetId()) {
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_C:
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case OpCode::Id::HADD2_C:
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case OpCode::Id::HADD2_R:
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case OpCode::Id::HADD2_R:
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return Operation(OperationCode::HAdd, meta, op_a, op_b);
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return Operation(OperationCode::HAdd, PRECISE, op_a, op_b);
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case OpCode::Id::HMUL2_C:
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case OpCode::Id::HMUL2_C:
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case OpCode::Id::HMUL2_R:
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case OpCode::Id::HMUL2_R:
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return Operation(OperationCode::HMul, meta, op_a, op_b);
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return Operation(OperationCode::HMul, PRECISE, op_a, op_b);
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default:
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default:
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UNIMPLEMENTED_MSG("Unhandled half float instruction: {}", opcode->get().GetName());
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UNIMPLEMENTED_MSG("Unhandled half float instruction: {}", opcode->get().GetName());
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return Immediate(0);
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return Immediate(0);
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@ -24,18 +24,17 @@ u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
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UNIMPLEMENTED_IF(instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None);
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UNIMPLEMENTED_IF(instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None);
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}
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}
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Node op_a = GetRegister(instr.gpr8);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.alu_half_imm.abs_a, instr.alu_half_imm.negate_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.alu_half_imm.abs_a, instr.alu_half_imm.negate_a);
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const Node op_b = UnpackHalfImmediate(instr, true);
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const Node op_b = UnpackHalfImmediate(instr, true);
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Node value = [&]() {
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Node value = [&]() {
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MetaHalfArithmetic meta{true, {instr.alu_half_imm.type_a}};
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switch (opcode->get().GetId()) {
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_IMM:
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case OpCode::Id::HADD2_IMM:
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return Operation(OperationCode::HAdd, meta, op_a, op_b);
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return Operation(OperationCode::HAdd, PRECISE, op_a, op_b);
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case OpCode::Id::HMUL2_IMM:
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case OpCode::Id::HMUL2_IMM:
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return Operation(OperationCode::HMul, meta, op_a, op_b);
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return Operation(OperationCode::HMul, PRECISE, op_a, op_b);
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default:
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default:
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UNREACHABLE();
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UNREACHABLE();
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return Immediate(0);
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return Immediate(0);
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@ -22,9 +22,9 @@ u32 ShaderIR::DecodeHalfSet(NodeBlock& bb, u32 pc) {
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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}
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}
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// instr.hset2.type_a
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hset2.type_a);
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// instr.hset2.type_b
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op_a = GetOperandAbsNegHalf(op_a, instr.hset2.abs_a, instr.hset2.negate_a);
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Node op_a = GetRegister(instr.gpr8);
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Node op_b = [&]() {
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Node op_b = [&]() {
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switch (opcode->get().GetId()) {
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switch (opcode->get().GetId()) {
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case OpCode::Id::HSET2_R:
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case OpCode::Id::HSET2_R:
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@ -34,14 +34,12 @@ u32 ShaderIR::DecodeHalfSet(NodeBlock& bb, u32 pc) {
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return Immediate(0);
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return Immediate(0);
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}
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}
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}();
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}();
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op_b = UnpackHalfFloat(op_b, instr.hset2.type_b);
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op_a = GetOperandAbsNegHalf(op_a, instr.hset2.abs_a, instr.hset2.negate_a);
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op_b = GetOperandAbsNegHalf(op_b, instr.hset2.abs_b, instr.hset2.negate_b);
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op_b = GetOperandAbsNegHalf(op_b, instr.hset2.abs_b, instr.hset2.negate_b);
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const Node second_pred = GetPredicate(instr.hset2.pred39, instr.hset2.neg_pred);
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const Node second_pred = GetPredicate(instr.hset2.pred39, instr.hset2.neg_pred);
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MetaHalfArithmetic meta{false, {instr.hset2.type_a, instr.hset2.type_b}};
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const Node comparison_pair = GetPredicateComparisonHalf(instr.hset2.cond, op_a, op_b);
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const Node comparison_pair = GetPredicateComparisonHalf(instr.hset2.cond, meta, op_a, op_b);
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const OperationCode combiner = GetPredicateCombiner(instr.hset2.op);
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const OperationCode combiner = GetPredicateCombiner(instr.hset2.op);
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@ -19,10 +19,10 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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UNIMPLEMENTED_IF(instr.hsetp2.ftz != 0);
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UNIMPLEMENTED_IF(instr.hsetp2.ftz != 0);
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Node op_a = GetRegister(instr.gpr8);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
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const Node op_b = [&]() {
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Node op_b = [&]() {
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switch (opcode->get().GetId()) {
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switch (opcode->get().GetId()) {
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case OpCode::Id::HSETP2_R:
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case OpCode::Id::HSETP2_R:
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return GetOperandAbsNegHalf(GetRegister(instr.gpr20), instr.hsetp2.abs_a,
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return GetOperandAbsNegHalf(GetRegister(instr.gpr20), instr.hsetp2.abs_a,
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@ -32,6 +32,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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return Immediate(0);
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return Immediate(0);
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}
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}
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}();
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}();
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op_b = UnpackHalfFloat(op_b, instr.hsetp2.type_b);
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// We can't use the constant predicate as destination.
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// We can't use the constant predicate as destination.
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ASSERT(instr.hsetp2.pred3 != static_cast<u64>(Pred::UnusedIndex));
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ASSERT(instr.hsetp2.pred3 != static_cast<u64>(Pred::UnusedIndex));
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@ -42,8 +43,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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const OperationCode pair_combiner =
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const OperationCode pair_combiner =
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instr.hsetp2.h_and ? OperationCode::LogicalAll2 : OperationCode::LogicalAny2;
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instr.hsetp2.h_and ? OperationCode::LogicalAll2 : OperationCode::LogicalAny2;
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MetaHalfArithmetic meta = {false, {instr.hsetp2.type_a, instr.hsetp2.type_b}};
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const Node comparison = GetPredicateComparisonHalf(instr.hsetp2.cond, op_a, op_b);
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const Node comparison = GetPredicateComparisonHalf(instr.hsetp2.cond, meta, op_a, op_b);
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const Node first_pred = Operation(pair_combiner, comparison);
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const Node first_pred = Operation(pair_combiner, comparison);
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// Set the primary predicate to the result of Predicate OP SecondPredicate
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// Set the primary predicate to the result of Predicate OP SecondPredicate
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@ -27,10 +27,6 @@ u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
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}
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}
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constexpr auto identity = HalfType::H0_H1;
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constexpr auto identity = HalfType::H0_H1;
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const HalfType type_a = instr.hfma2.type_a;
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const Node op_a = GetRegister(instr.gpr8);
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bool neg_b{}, neg_c{};
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bool neg_b{}, neg_c{};
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auto [saturate, type_b, op_b, type_c,
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auto [saturate, type_b, op_b, type_c,
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op_c] = [&]() -> std::tuple<bool, HalfType, Node, HalfType, Node> {
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op_c] = [&]() -> std::tuple<bool, HalfType, Node, HalfType, Node> {
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@ -62,11 +58,11 @@ u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
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}();
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}();
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UNIMPLEMENTED_IF_MSG(saturate, "HFMA2 saturation is not implemented");
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UNIMPLEMENTED_IF_MSG(saturate, "HFMA2 saturation is not implemented");
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op_b = GetOperandAbsNegHalf(op_b, false, neg_b);
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const Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hfma2.type_a);
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op_c = GetOperandAbsNegHalf(op_c, false, neg_c);
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op_b = GetOperandAbsNegHalf(UnpackHalfFloat(op_b, type_b), false, neg_b);
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op_c = GetOperandAbsNegHalf(UnpackHalfFloat(op_c, type_c), false, neg_c);
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MetaHalfArithmetic meta{true, {type_a, type_b, type_c}};
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Node value = Operation(OperationCode::HFma, PRECISE, op_a, op_b, op_c);
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Node value = Operation(OperationCode::HFma, meta, op_a, op_b, op_c);
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value = HalfMerge(GetRegister(instr.gpr0), value, instr.hfma2.merge);
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value = HalfMerge(GetRegister(instr.gpr0), value, instr.hfma2.merge);
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SetRegister(bb, instr.gpr0, value);
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SetRegister(bb, instr.gpr0, value);
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@ -189,7 +189,11 @@ Node ShaderIR::UnpackHalfImmediate(Instruction instr, bool has_negation) {
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const Node first_negate = GetPredicate(instr.half_imm.first_negate != 0);
|
const Node first_negate = GetPredicate(instr.half_imm.first_negate != 0);
|
||||||
const Node second_negate = GetPredicate(instr.half_imm.second_negate != 0);
|
const Node second_negate = GetPredicate(instr.half_imm.second_negate != 0);
|
||||||
|
|
||||||
return Operation(OperationCode::HNegate, HALF_NO_PRECISE, value, first_negate, second_negate);
|
return Operation(OperationCode::HNegate, NO_PRECISE, value, first_negate, second_negate);
|
||||||
|
}
|
||||||
|
|
||||||
|
Node ShaderIR::UnpackHalfFloat(Node value, Tegra::Shader::HalfType type) {
|
||||||
|
return Operation(OperationCode::HUnpack, type, value);
|
||||||
}
|
}
|
||||||
|
|
||||||
Node ShaderIR::HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge) {
|
Node ShaderIR::HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge) {
|
||||||
@ -209,10 +213,10 @@ Node ShaderIR::HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge) {
|
|||||||
|
|
||||||
Node ShaderIR::GetOperandAbsNegHalf(Node value, bool absolute, bool negate) {
|
Node ShaderIR::GetOperandAbsNegHalf(Node value, bool absolute, bool negate) {
|
||||||
if (absolute) {
|
if (absolute) {
|
||||||
value = Operation(OperationCode::HAbsolute, HALF_NO_PRECISE, value);
|
value = Operation(OperationCode::HAbsolute, NO_PRECISE, value);
|
||||||
}
|
}
|
||||||
if (negate) {
|
if (negate) {
|
||||||
value = Operation(OperationCode::HNegate, HALF_NO_PRECISE, value, GetPredicate(true),
|
value = Operation(OperationCode::HNegate, NO_PRECISE, value, GetPredicate(true),
|
||||||
GetPredicate(true));
|
GetPredicate(true));
|
||||||
}
|
}
|
||||||
return value;
|
return value;
|
||||||
@ -224,7 +228,7 @@ Node ShaderIR::GetSaturatedHalfFloat(Node value, bool saturate) {
|
|||||||
}
|
}
|
||||||
const Node positive_zero = Immediate(std::copysignf(0, 1));
|
const Node positive_zero = Immediate(std::copysignf(0, 1));
|
||||||
const Node positive_one = Immediate(1.0f);
|
const Node positive_one = Immediate(1.0f);
|
||||||
return Operation(OperationCode::HClamp, HALF_NO_PRECISE, value, positive_zero, positive_one);
|
return Operation(OperationCode::HClamp, NO_PRECISE, value, positive_zero, positive_one);
|
||||||
}
|
}
|
||||||
|
|
||||||
Node ShaderIR::GetPredicateComparisonFloat(PredCondition condition, Node op_a, Node op_b) {
|
Node ShaderIR::GetPredicateComparisonFloat(PredCondition condition, Node op_a, Node op_b) {
|
||||||
@ -292,8 +296,8 @@ Node ShaderIR::GetPredicateComparisonInteger(PredCondition condition, bool is_si
|
|||||||
return predicate;
|
return predicate;
|
||||||
}
|
}
|
||||||
|
|
||||||
Node ShaderIR::GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition,
|
Node ShaderIR::GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition, Node op_a,
|
||||||
const MetaHalfArithmetic& meta, Node op_a, Node op_b) {
|
Node op_b) {
|
||||||
const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
||||||
{PredCondition::LessThan, OperationCode::Logical2HLessThan},
|
{PredCondition::LessThan, OperationCode::Logical2HLessThan},
|
||||||
{PredCondition::Equal, OperationCode::Logical2HEqual},
|
{PredCondition::Equal, OperationCode::Logical2HEqual},
|
||||||
@ -311,7 +315,7 @@ Node ShaderIR::GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition
|
|||||||
UNIMPLEMENTED_IF_MSG(comparison == PredicateComparisonTable.end(),
|
UNIMPLEMENTED_IF_MSG(comparison == PredicateComparisonTable.end(),
|
||||||
"Unknown predicate comparison operation");
|
"Unknown predicate comparison operation");
|
||||||
|
|
||||||
const Node predicate = Operation(comparison->second, meta, op_a, op_b);
|
const Node predicate = Operation(comparison->second, NO_PRECISE, op_a, op_b);
|
||||||
|
|
||||||
return predicate;
|
return predicate;
|
||||||
}
|
}
|
||||||
|
@ -109,12 +109,13 @@ enum class OperationCode {
|
|||||||
UBitfieldExtract, /// (MetaArithmetic, uint value, int offset, int offset) -> uint
|
UBitfieldExtract, /// (MetaArithmetic, uint value, int offset, int offset) -> uint
|
||||||
UBitCount, /// (MetaArithmetic, uint) -> uint
|
UBitCount, /// (MetaArithmetic, uint) -> uint
|
||||||
|
|
||||||
HAdd, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
HAdd, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
||||||
HMul, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
HMul, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
||||||
HFma, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
|
HFma, /// (MetaArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
|
||||||
HAbsolute, /// (f16vec2 a) -> f16vec2
|
HAbsolute, /// (f16vec2 a) -> f16vec2
|
||||||
HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
|
HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
|
||||||
HClamp, /// (f16vec2 src, float min, float max) -> f16vec2
|
HClamp, /// (f16vec2 src, float min, float max) -> f16vec2
|
||||||
|
HUnpack, /// (Tegra::Shader::HalfType, T value) -> f16vec2
|
||||||
HMergeF32, /// (f16vec2 src) -> float
|
HMergeF32, /// (f16vec2 src) -> float
|
||||||
HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
|
HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
|
||||||
HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
|
HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
|
||||||
@ -287,13 +288,6 @@ struct MetaArithmetic {
|
|||||||
bool precise{};
|
bool precise{};
|
||||||
};
|
};
|
||||||
|
|
||||||
struct MetaHalfArithmetic {
|
|
||||||
bool precise{};
|
|
||||||
std::array<Tegra::Shader::HalfType, 3> types = {Tegra::Shader::HalfType::H0_H1,
|
|
||||||
Tegra::Shader::HalfType::H0_H1,
|
|
||||||
Tegra::Shader::HalfType::H0_H1};
|
|
||||||
};
|
|
||||||
|
|
||||||
struct MetaTexture {
|
struct MetaTexture {
|
||||||
const Sampler& sampler;
|
const Sampler& sampler;
|
||||||
Node array{};
|
Node array{};
|
||||||
@ -305,11 +299,10 @@ struct MetaTexture {
|
|||||||
u32 element{};
|
u32 element{};
|
||||||
};
|
};
|
||||||
|
|
||||||
constexpr MetaArithmetic PRECISE = {true};
|
inline constexpr MetaArithmetic PRECISE = {true};
|
||||||
constexpr MetaArithmetic NO_PRECISE = {false};
|
inline constexpr MetaArithmetic NO_PRECISE = {false};
|
||||||
constexpr MetaHalfArithmetic HALF_NO_PRECISE = {false};
|
|
||||||
|
|
||||||
using Meta = std::variant<MetaArithmetic, MetaHalfArithmetic, MetaTexture>;
|
using Meta = std::variant<MetaArithmetic, MetaTexture, Tegra::Shader::HalfType>;
|
||||||
|
|
||||||
/// Holds any kind of operation that can be done in the IR
|
/// Holds any kind of operation that can be done in the IR
|
||||||
class OperationNode final {
|
class OperationNode final {
|
||||||
@ -713,6 +706,8 @@ private:
|
|||||||
|
|
||||||
/// Unpacks a half immediate from an instruction
|
/// Unpacks a half immediate from an instruction
|
||||||
Node UnpackHalfImmediate(Tegra::Shader::Instruction instr, bool has_negation);
|
Node UnpackHalfImmediate(Tegra::Shader::Instruction instr, bool has_negation);
|
||||||
|
/// Unpacks a binary value into a half float pair with a type format
|
||||||
|
Node UnpackHalfFloat(Node value, Tegra::Shader::HalfType type);
|
||||||
/// Merges a half pair into another value
|
/// Merges a half pair into another value
|
||||||
Node HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge);
|
Node HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge);
|
||||||
/// Conditionally absolute/negated half float pair. Absolute is applied first
|
/// Conditionally absolute/negated half float pair. Absolute is applied first
|
||||||
@ -726,8 +721,7 @@ private:
|
|||||||
Node GetPredicateComparisonInteger(Tegra::Shader::PredCondition condition, bool is_signed,
|
Node GetPredicateComparisonInteger(Tegra::Shader::PredCondition condition, bool is_signed,
|
||||||
Node op_a, Node op_b);
|
Node op_a, Node op_b);
|
||||||
/// Returns a predicate comparing two half floats. meta consumes how both pairs will be compared
|
/// Returns a predicate comparing two half floats. meta consumes how both pairs will be compared
|
||||||
Node GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition,
|
Node GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition, Node op_a, Node op_b);
|
||||||
const MetaHalfArithmetic& meta, Node op_a, Node op_b);
|
|
||||||
|
|
||||||
/// Returns a predicate combiner operation
|
/// Returns a predicate combiner operation
|
||||||
OperationCode GetPredicateCombiner(Tegra::Shader::PredOperation operation);
|
OperationCode GetPredicateCombiner(Tegra::Shader::PredOperation operation);
|
||||||
|
Loading…
Reference in New Issue
Block a user