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Merge pull request #8148 from merryhime/interrupts
dynarmic: Better interrupts
This commit is contained in:
commit
50192eb4ad
2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
@ -1 +1 @@
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Subproject commit af2d50288fc537201014c4230bb55ab9018a7438
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Subproject commit 644172477eaf0d822178cb7e96c62b75caa96573
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@ -171,6 +171,9 @@ public:
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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virtual void PrepareReschedule() = 0;
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/// Signal an interrupt and ask the core to halt as soon as possible.
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virtual void SignalInterrupt() = 0;
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struct BacktraceEntry {
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std::string module;
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u64 address;
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@ -25,6 +25,9 @@ namespace Core {
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using namespace Common::Literals;
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constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2;
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constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3;
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class DynarmicCallbacks32 : public Dynarmic::A32::UserCallbacks {
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public:
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explicit DynarmicCallbacks32(ARM_Dynarmic_32& parent_)
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@ -84,15 +87,13 @@ public:
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}
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void CallSVC(u32 swi) override {
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parent.svc_called = true;
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parent.svc_swi = swi;
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parent.jit->HaltExecution();
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parent.jit->HaltExecution(svc_call);
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}
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void AddTicks(u64 ticks) override {
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if (parent.uses_wall_clock) {
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return;
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}
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ASSERT_MSG(!parent.uses_wall_clock, "This should never happen - dynarmic ticking disabled");
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// Divide the number of ticks by the amount of CPU cores. TODO(Subv): This yields only a
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// rough approximation of the amount of executed ticks in the system, it may be thrown off
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// if not all cores are doing a similar amount of work. Instead of doing this, we should
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@ -108,12 +109,8 @@ public:
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}
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u64 GetTicksRemaining() override {
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if (parent.uses_wall_clock) {
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if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
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return minimum_run_cycles;
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}
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return 0U;
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}
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ASSERT_MSG(!parent.uses_wall_clock, "This should never happen - dynarmic ticking disabled");
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return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0);
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}
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@ -148,6 +145,7 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
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// Timing
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config.wall_clock_cntpct = uses_wall_clock;
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config.enable_cycle_counting = !uses_wall_clock;
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// Code cache size
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config.code_cache_size = 512_MiB;
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@ -230,13 +228,11 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
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void ARM_Dynarmic_32::Run() {
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while (true) {
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jit->Run();
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if (!svc_called) {
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break;
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const auto hr = jit->Run();
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if (Has(hr, svc_call)) {
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Kernel::Svc::Call(system, svc_swi);
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}
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svc_called = false;
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Kernel::Svc::Call(system, svc_swi);
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if (shutdown) {
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if (Has(hr, break_loop)) {
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break;
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}
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}
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@ -322,8 +318,11 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
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}
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void ARM_Dynarmic_32::PrepareReschedule() {
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jit->HaltExecution();
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shutdown = true;
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jit->HaltExecution(break_loop);
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}
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void ARM_Dynarmic_32::SignalInterrupt() {
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jit->HaltExecution(break_loop);
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}
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void ARM_Dynarmic_32::ClearInstructionCache() {
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@ -57,6 +57,7 @@ public:
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void LoadContext(const ThreadContext64& ctx) override {}
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void PrepareReschedule() override;
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void SignalInterrupt() override;
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void ClearExclusiveState() override;
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void ClearInstructionCache() override;
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@ -83,9 +84,6 @@ private:
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// SVC callback
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u32 svc_swi{};
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bool svc_called{};
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bool shutdown{};
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};
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} // namespace Core
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@ -26,6 +26,9 @@ namespace Core {
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using Vector = Dynarmic::A64::Vector;
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using namespace Common::Literals;
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constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2;
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constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3;
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class DynarmicCallbacks64 : public Dynarmic::A64::UserCallbacks {
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public:
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explicit DynarmicCallbacks64(ARM_Dynarmic_64& parent_)
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@ -106,7 +109,7 @@ public:
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break;
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}
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parent.jit->HaltExecution();
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parent.jit->HaltExecution(Dynarmic::HaltReason::CacheInvalidation);
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}
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void ExceptionRaised(u64 pc, Dynarmic::A64::Exception exception) override {
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@ -126,15 +129,12 @@ public:
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}
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void CallSVC(u32 swi) override {
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parent.svc_called = true;
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parent.svc_swi = swi;
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parent.jit->HaltExecution();
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parent.jit->HaltExecution(svc_call);
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}
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void AddTicks(u64 ticks) override {
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if (parent.uses_wall_clock) {
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return;
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}
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ASSERT_MSG(!parent.uses_wall_clock, "This should never happen - dynarmic ticking disabled");
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// Divide the number of ticks by the amount of CPU cores. TODO(Subv): This yields only a
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// rough approximation of the amount of executed ticks in the system, it may be thrown off
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@ -149,12 +149,8 @@ public:
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}
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u64 GetTicksRemaining() override {
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if (parent.uses_wall_clock) {
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if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
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return minimum_run_cycles;
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}
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return 0U;
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}
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ASSERT_MSG(!parent.uses_wall_clock, "This should never happen - dynarmic ticking disabled");
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return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0);
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}
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@ -210,6 +206,7 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
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// Timing
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config.wall_clock_cntpct = uses_wall_clock;
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config.enable_cycle_counting = !uses_wall_clock;
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// Code cache size
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config.code_cache_size = 512_MiB;
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@ -292,13 +289,11 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
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void ARM_Dynarmic_64::Run() {
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while (true) {
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jit->Run();
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if (!svc_called) {
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break;
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const auto hr = jit->Run();
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if (Has(hr, svc_call)) {
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Kernel::Svc::Call(system, svc_swi);
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}
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svc_called = false;
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Kernel::Svc::Call(system, svc_swi);
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if (shutdown) {
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if (Has(hr, break_loop)) {
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break;
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}
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}
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@ -389,8 +384,11 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
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}
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void ARM_Dynarmic_64::PrepareReschedule() {
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jit->HaltExecution();
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shutdown = true;
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jit->HaltExecution(break_loop);
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}
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void ARM_Dynarmic_64::SignalInterrupt() {
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jit->HaltExecution(break_loop);
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}
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void ARM_Dynarmic_64::ClearInstructionCache() {
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@ -51,6 +51,7 @@ public:
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void LoadContext(const ThreadContext64& ctx) override;
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void PrepareReschedule() override;
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void SignalInterrupt() override;
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void ClearExclusiveState() override;
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void ClearInstructionCache() override;
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@ -77,9 +78,6 @@ private:
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// SVC callback
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u32 svc_swi{};
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bool svc_called{};
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bool shutdown{};
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};
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} // namespace Core
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@ -58,6 +58,7 @@ bool PhysicalCore::IsInterrupted() const {
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void PhysicalCore::Interrupt() {
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guard->lock();
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interrupts[core_index].SetInterrupt(true);
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arm_interface->SignalInterrupt();
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guard->unlock();
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}
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