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https://github.com/yuzu-emu/yuzu-mainline.git
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added support for reading/writing to stack mem
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@ -40,23 +40,29 @@ MemArena g_arena; ///< The MemArena class
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u8* g_bootrom = NULL; ///< Bootrom memory (super secret code/data @ 0x8000) pointer
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u8* g_fcram = NULL; ///< Main memory (FCRAM) pointer
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u8* g_vram = NULL; ///< Video memory (VRAM) pointer
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u8* g_scratchpad = NULL; ///< [Hack] Seperate mem for stack space because I don't know where this goes
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u8* g_physical_bootrom = NULL; ///< Bootrom physical memory (super secret code/data @ 0x8000)
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u8* g_uncached_bootrom = NULL;
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u8* g_physical_fcram = NULL; ///< Main physical memory (FCRAM)
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u8* g_physical_vram = NULL; ///< Video physical memory (VRAM)
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u8* g_physical_scratchpad = NULL; ///< Scratchpad memory used for main thread stack
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// We don't declare the IO region in here since its handled by other means.
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static MemoryView g_views[] =
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{
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{&g_bootrom, &g_physical_bootrom, 0x00000000, MEM_BOOTROM_SIZE, 0},
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{NULL, &g_uncached_bootrom, 0x00010000, MEM_BOOTROM_SIZE, MV_MIRROR_PREVIOUS},
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// //{NULL, NULL, 0x17E00000, MEM_MPCORE_PRIV_SIZE, 0},
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{&g_vram, &g_physical_vram, 0x18000000, MEM_VRAM_SIZE, 0},
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// //{NULL, NULL, 0x1FF00000, MEM_DSP_SIZE, 0},
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// //{NULL, NULL, 0x1FF80000, MEM_AXI_WRAM_SIZE, 0},
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{&g_fcram, &g_physical_fcram, 0x20000000, MEM_FCRAM_SIZE, MV_IS_PRIMARY_RAM},
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{&g_scratchpad, &g_physical_scratchpad, 0x00000000, MEM_SCRATCHPAD_SIZE, 0 },
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// {&g_bootrom, &g_physical_bootrom, 0x00000000, MEM_BOOTROM_SIZE, 0},
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// {NULL, &g_uncached_bootrom, 0x00010000, MEM_BOOTROM_SIZE, MV_MIRROR_PREVIOUS},
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// {NULL, NULL, 0x17E00000, MEM_MPCORE_PRIV_SIZE, 0},
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{&g_vram, &g_physical_vram, MEM_VRAM_VADDR, MEM_VRAM_SIZE, MV_IS_PRIMARY_RAM},
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// {NULL, NULL, 0x1FF00000, MEM_DSP_SIZE, 0},
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// {NULL, NULL, 0x1FF80000, MEM_AXI_WRAM_SIZE, 0},
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{&g_fcram, &g_physical_fcram, MEM_FCRAM_VADDR, MEM_FCRAM_SIZE, MV_IS_PRIMARY_RAM},
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};
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/*static MemoryView views[] =
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@ -37,10 +37,17 @@
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#define MEM_VRAM_SIZE 0x00600000 ///< VRAM size
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#define MEM_DSP_SIZE 0x00080000 ///< DSP memory size
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#define MEM_AXI_WRAM_SIZE 0x00080000 ///< AXI WRAM size
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#define MEM_FCRAM_SIZE 0x08000000 ///< FCRAM size
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#define MEM_FCRAM_SIZE 0x08000000 ///< FCRAM size... Really 0x07E00000, but power of 2
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// works much better
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#define MEM_SCRATCHPAD_SIZE 0x00004000 ///< Typical stack size - TODO: Read from exheader
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#define MEM_VRAM_MASK 0x007FFFFF
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#define MEM_FCRAM_MASK (MEM_FCRAM_SIZE - 1) ///< FCRAm mask
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#define MEM_FCRAM_MASK (MEM_FCRAM_SIZE - 1) ///< FCRAM mask
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#define MEM_SCRATCHPAD_MASK (MEM_SCRATCHPAD_SIZE - 1) ///< Scratchpad memory mask
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#define MEM_FCRAM_VADDR 0x08000000
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#define MEM_VRAM_VADDR 0x1F000000
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#define MEM_SCRATCHPAD_VADDR (0x10000000 - MEM_SCRATCHPAD_SIZE) ///< Scratchpad virtual address
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////////////////////////////////////////////////////////////////////////////////////////////////////
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@ -60,6 +67,7 @@ extern u8 *g_base;
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// 32-bit: Same as the corresponding physical/virtual pointers.
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extern u8* g_fcram; ///< Main memory
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extern u8* g_vram; ///< Video memory (VRAM)
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extern u8* g_scratchpad; ///< Stack memory
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void Init();
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void Shutdown();
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@ -38,6 +38,10 @@ inline void ReadFromHardware(T &var, const u32 addr)
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if ((addr & 0x3E000000) == 0x08000000) {
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var = *((const T*)&g_fcram[addr & MEM_FCRAM_MASK]);
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// Scratchpad memory
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} else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) {
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var = *((const T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK]);
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}
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/*else if ((addr & 0x3F800000) == 0x04000000) {
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var = *((const T*)&m_pVRAM[addr & VRAM_MASK]);
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@ -61,6 +65,11 @@ inline void WriteToHardware(u32 addr, const T data) {
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// exheader "special memory" flag is set, however this address can be arbitrary.
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*(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data;
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NOTICE_LOG(MEMMAP, "Test2");
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// Scratchpad memory
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} else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) {
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*(T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK] = data;
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// Heap mapped by ControlMemory:
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} else if ((addr & 0x3E000000) == 0x08000000) {
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// TODO(ShizZy): Writes to this virtual address should be put in physical memory at FCRAM + GSP
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