mirror of
https://github.com/yuzu-emu/yuzu-mainline.git
synced 2024-12-12 17:34:23 +01:00
Refactor VideoCore to use AS sepparate from Channel.
This commit is contained in:
Fernando Sahmkow
parent
bb74973bba
commit
e462191482
@ -18,4 +18,11 @@ struct PairHash {
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}
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};
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template <typename T>
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struct IdentityHash {
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[[nodiscard]] size_t operator()(T value) const noexcept {
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return static_cast<size_t>(value);
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}
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};
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} // namespace Common
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@ -203,6 +203,7 @@ add_library(video_core STATIC
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texture_cache/render_targets.h
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texture_cache/samples_helper.h
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texture_cache/slot_vector.h
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texture_cache/texture_cache.cpp
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texture_cache/texture_cache.h
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texture_cache/texture_cache_base.h
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texture_cache/types.h
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@ -1,5 +1,11 @@
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#include "video_core/control/channel_state_cache.inc"
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namespace VideoCommon {
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ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& channel_state)
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: maxwell3d{*channel_state.maxwell_3d}, kepler_compute{*channel_state.kepler_compute},
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gpu_memory{*channel_state.memory_manager} {}
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template class VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo>;
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}
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} // namespace VideoCommon
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@ -2,6 +2,7 @@
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#include <deque>
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#include <limits>
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#include <mutex>
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#include <unordered_map>
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#include "common/common_types.h"
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@ -41,9 +42,10 @@ template <class P>
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class ChannelSetupCaches {
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public:
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/// Operations for seting the channel of execution.
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virtual ~ChannelSetupCaches();
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/// Create channel state.
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void CreateChannel(Tegra::Control::ChannelState& channel);
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virtual void CreateChannel(Tegra::Control::ChannelState& channel);
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/// Bind a channel for execution.
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void BindToChannel(s32 id);
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@ -51,18 +53,34 @@ public:
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/// Erase channel's state.
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void EraseChannel(s32 id);
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Tegra::MemoryManager* GetFromID(size_t id) const {
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std::unique_lock<std::mutex> lk(config_mutex);
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const auto ref = address_spaces.find(id);
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return ref->second.gpu_memory;
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}
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protected:
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static constexpr size_t UNSET_CHANNEL{std::numeric_limits<size_t>::max()};
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P* channel_state;
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size_t current_channel_id{UNSET_CHANNEL};
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size_t current_address_space{};
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Tegra::Engines::Maxwell3D* maxwell3d;
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Tegra::Engines::KeplerCompute* kepler_compute;
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Tegra::MemoryManager* gpu_memory;
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std::deque<P> channel_storage;
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std::deque<size_t> free_channel_ids;
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std::unordered_map<s32, size_t> channel_map;
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struct AddresSpaceRef {
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size_t ref_count;
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size_t storage_id;
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Tegra::MemoryManager* gpu_memory;
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};
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std::unordered_map<size_t, AddresSpaceRef> address_spaces;
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mutable std::mutex config_mutex;
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P* channel_state;
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size_t current_channel_id{UNSET_CHANNEL};
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Tegra::Engines::Maxwell3D* maxwell3d;
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Tegra::Engines::KeplerCompute* kepler_compute;
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Tegra::MemoryManager* gpu_memory;
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virtual void OnGPUASRegister([[maybe_unused]] size_t map_id) {}
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};
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} // namespace VideoCommon
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@ -6,18 +6,18 @@
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namespace VideoCommon {
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ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& channel_state)
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: maxwell3d{*channel_state.maxwell_3d}, kepler_compute{*channel_state.kepler_compute},
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gpu_memory{*channel_state.memory_manager} {}
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template <class P>
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ChannelSetupCaches<P>::~ChannelSetupCaches() = default;
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template <class P>
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void ChannelSetupCaches<P>::CreateChannel(struct Tegra::Control::ChannelState& channel) {
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std::unique_lock<std::mutex> lk(config_mutex);
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ASSERT(channel_map.find(channel.bind_id) == channel_map.end() && channel.bind_id >= 0);
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auto new_id = [this, &channel]() {
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if (!free_channel_ids.empty()) {
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auto id = free_channel_ids.front();
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free_channel_ids.pop_front();
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new (&channel_storage[id]) ChannelInfo(channel);
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new (&channel_storage[id]) P(channel);
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return id;
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}
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channel_storage.emplace_back(channel);
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@ -27,11 +27,24 @@ void ChannelSetupCaches<P>::CreateChannel(struct Tegra::Control::ChannelState& c
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if (current_channel_id != UNSET_CHANNEL) {
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channel_state = &channel_storage[current_channel_id];
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}
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auto as_it = address_spaces.find(channel.memory_manager->GetID());
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if (as_it != address_spaces.end()) {
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as_it->second.ref_count++;
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return;
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}
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AddresSpaceRef new_gpu_mem_ref{
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.ref_count = 1,
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.storage_id = address_spaces.size(),
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.gpu_memory = channel.memory_manager.get(),
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};
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address_spaces.emplace(channel.memory_manager->GetID(), new_gpu_mem_ref);
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OnGPUASRegister(channel.memory_manager->GetID());
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}
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/// Bind a channel for execution.
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template <class P>
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void ChannelSetupCaches<P>::BindToChannel(s32 id) {
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std::unique_lock<std::mutex> lk(config_mutex);
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auto it = channel_map.find(id);
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ASSERT(it != channel_map.end() && id >= 0);
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current_channel_id = it->second;
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@ -39,11 +52,13 @@ void ChannelSetupCaches<P>::BindToChannel(s32 id) {
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maxwell3d = &channel_state->maxwell3d;
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kepler_compute = &channel_state->kepler_compute;
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gpu_memory = &channel_state->gpu_memory;
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current_address_space = gpu_memory->GetID();
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}
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/// Erase channel's channel_state.
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template <class P>
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void ChannelSetupCaches<P>::EraseChannel(s32 id) {
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std::unique_lock<std::mutex> lk(config_mutex);
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const auto it = channel_map.find(id);
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ASSERT(it != channel_map.end() && id >= 0);
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const auto this_id = it->second;
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@ -16,9 +16,12 @@
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namespace Tegra {
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std::atomic<size_t> MemoryManager::unique_identifier_generator{};
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MemoryManager::MemoryManager(Core::System& system_, u64 address_space_bits_, u64 page_bits_)
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: system{system_}, address_space_bits{address_space_bits_}, page_bits{page_bits_}, entries{},
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page_table{address_space_bits, address_space_bits + page_bits - 38, page_bits} {
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page_table{address_space_bits, address_space_bits + page_bits - 38, page_bits},
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unique_identifier{unique_identifier_generator.fetch_add(1, std::memory_order_acq_rel)} {
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address_space_size = 1ULL << address_space_bits;
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allocate_start = address_space_bits > 32 ? 1ULL << 32 : 0;
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page_size = 1ULL << page_bits;
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@ -3,6 +3,7 @@
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#pragma once
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#include <atomic>
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#include <map>
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#include <optional>
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#include <vector>
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@ -26,6 +27,10 @@ public:
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u64 page_bits_ = 16);
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~MemoryManager();
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size_t GetID() const {
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return unique_identifier;
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}
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/// Binds a renderer to the memory manager.
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void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
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@ -140,6 +145,10 @@ private:
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void SetEntry(size_t position, EntryType entry);
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Common::MultiLevelPageTable<u32> page_table;
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const size_t unique_identifier;
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static std::atomic<size_t> unique_identifier_generator;
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};
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} // namespace Tegra
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16
src/video_core/texture_cache/texture_cache.cpp
Normal file
16
src/video_core/texture_cache/texture_cache.cpp
Normal file
@ -0,0 +1,16 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv3 or any later version
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// Refer to the license.txt file included.
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#include "video_core/control/channel_state_cache.inc"
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#include "video_core/texture_cache/texture_cache_base.h"
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namespace VideoCommon {
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TextureCacheChannelInfo::TextureCacheChannelInfo(Tegra::Control::ChannelState& state) noexcept
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: ChannelInfo(state), graphics_image_table{gpu_memory}, graphics_sampler_table{gpu_memory},
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compute_image_table{gpu_memory}, compute_sampler_table{gpu_memory} {}
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template class VideoCommon::ChannelSetupCaches<VideoCommon::TextureCacheChannelInfo>;
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} // namespace VideoCommon
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@ -1,5 +1,7 @@
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// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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// SPDX-FileCopyrightText: 2021 yuzu emulator team
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// (https://github.com/skyline-emu/)
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// SPDX-License-Identifier: GPL-3.0-or-later Licensed under GPLv3
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// or any later version Refer to the license.txt file included.
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#pragma once
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@ -41,10 +43,6 @@ TextureCache<P>::TextureCache(Runtime& runtime_, VideoCore::RasterizerInterface&
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// Setup channels
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current_channel_id = UNSET_CHANNEL;
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state = nullptr;
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maxwell3d = nullptr;
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kepler_compute = nullptr;
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gpu_memory = nullptr;
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// Make sure the first index is reserved for the null resources
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// This way the null resource becomes a compile time constant
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@ -156,23 +154,24 @@ void TextureCache<P>::MarkModification(ImageId id) noexcept {
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template <class P>
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template <bool has_blacklists>
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void TextureCache<P>::FillGraphicsImageViews(std::span<ImageViewInOut> views) {
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FillImageViews<has_blacklists>(state->graphics_image_table, state->graphics_image_view_ids,
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views);
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FillImageViews<has_blacklists>(channel_state->graphics_image_table,
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channel_state->graphics_image_view_ids, views);
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}
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template <class P>
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void TextureCache<P>::FillComputeImageViews(std::span<ImageViewInOut> views) {
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FillImageViews<true>(state->compute_image_table, state->compute_image_view_ids, views);
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FillImageViews<true>(channel_state->compute_image_table, channel_state->compute_image_view_ids,
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views);
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}
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template <class P>
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typename P::Sampler* TextureCache<P>::GetGraphicsSampler(u32 index) {
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if (index > state->graphics_sampler_table.Limit()) {
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if (index > channel_state->graphics_sampler_table.Limit()) {
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LOG_DEBUG(HW_GPU, "Invalid sampler index={}", index);
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return &slot_samplers[NULL_SAMPLER_ID];
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}
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const auto [descriptor, is_new] = state->graphics_sampler_table.Read(index);
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SamplerId& id = state->graphics_sampler_ids[index];
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const auto [descriptor, is_new] = channel_state->graphics_sampler_table.Read(index);
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SamplerId& id = channel_state->graphics_sampler_ids[index];
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if (is_new) {
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id = FindSampler(descriptor);
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}
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@ -181,12 +180,12 @@ typename P::Sampler* TextureCache<P>::GetGraphicsSampler(u32 index) {
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template <class P>
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typename P::Sampler* TextureCache<P>::GetComputeSampler(u32 index) {
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if (index > state->compute_sampler_table.Limit()) {
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if (index > channel_state->compute_sampler_table.Limit()) {
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LOG_DEBUG(HW_GPU, "Invalid sampler index={}", index);
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return &slot_samplers[NULL_SAMPLER_ID];
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}
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const auto [descriptor, is_new] = state->compute_sampler_table.Read(index);
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SamplerId& id = state->compute_sampler_ids[index];
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const auto [descriptor, is_new] = channel_state->compute_sampler_table.Read(index);
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SamplerId& id = channel_state->compute_sampler_ids[index];
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if (is_new) {
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id = FindSampler(descriptor);
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}
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@ -199,11 +198,12 @@ void TextureCache<P>::SynchronizeGraphicsDescriptors() {
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const bool linked_tsc = maxwell3d->regs.sampler_index == SamplerIndex::ViaHeaderIndex;
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const u32 tic_limit = maxwell3d->regs.tic.limit;
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const u32 tsc_limit = linked_tsc ? tic_limit : maxwell3d->regs.tsc.limit;
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if (state->graphics_sampler_table.Synchornize(maxwell3d->regs.tsc.Address(), tsc_limit)) {
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state->graphics_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID);
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if (channel_state->graphics_sampler_table.Synchornize(maxwell3d->regs.tsc.Address(),
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tsc_limit)) {
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channel_state->graphics_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID);
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}
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if (state->graphics_image_table.Synchornize(maxwell3d->regs.tic.Address(), tic_limit)) {
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state->graphics_image_view_ids.resize(tic_limit + 1, CORRUPT_ID);
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if (channel_state->graphics_image_table.Synchornize(maxwell3d->regs.tic.Address(), tic_limit)) {
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channel_state->graphics_image_view_ids.resize(tic_limit + 1, CORRUPT_ID);
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}
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}
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@ -213,11 +213,12 @@ void TextureCache<P>::SynchronizeComputeDescriptors() {
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const u32 tic_limit = kepler_compute->regs.tic.limit;
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const u32 tsc_limit = linked_tsc ? tic_limit : kepler_compute->regs.tsc.limit;
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const GPUVAddr tsc_gpu_addr = kepler_compute->regs.tsc.Address();
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if (state->compute_sampler_table.Synchornize(tsc_gpu_addr, tsc_limit)) {
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state->compute_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID);
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if (channel_state->compute_sampler_table.Synchornize(tsc_gpu_addr, tsc_limit)) {
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channel_state->compute_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID);
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}
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if (state->compute_image_table.Synchornize(kepler_compute->regs.tic.Address(), tic_limit)) {
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state->compute_image_view_ids.resize(tic_limit + 1, CORRUPT_ID);
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if (channel_state->compute_image_table.Synchornize(kepler_compute->regs.tic.Address(),
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tic_limit)) {
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channel_state->compute_image_view_ids.resize(tic_limit + 1, CORRUPT_ID);
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}
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}
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@ -738,7 +739,7 @@ ImageViewId TextureCache<P>::FindImageView(const TICEntry& config) {
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if (!IsValidEntry(*gpu_memory, config)) {
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return NULL_IMAGE_VIEW_ID;
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}
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const auto [pair, is_new] = state->image_views.try_emplace(config);
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const auto [pair, is_new] = channel_state->image_views.try_emplace(config);
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ImageViewId& image_view_id = pair->second;
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if (is_new) {
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image_view_id = CreateImageView(config);
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@ -1198,7 +1199,7 @@ SamplerId TextureCache<P>::FindSampler(const TSCEntry& config) {
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if (std::ranges::all_of(config.raw, [](u64 value) { return value == 0; })) {
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return NULL_SAMPLER_ID;
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}
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const auto [pair, is_new] = state->samplers.try_emplace(config);
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const auto [pair, is_new] = channel_state->samplers.try_emplace(config);
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if (is_new) {
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pair->second = slot_samplers.insert(runtime, config);
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}
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@ -1327,8 +1328,8 @@ void TextureCache<P>::ForEachImageInRegionGPU(GPUVAddr gpu_addr, size_t size, Fu
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static constexpr bool BOOL_BREAK = std::is_same_v<FuncReturn, bool>;
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boost::container::small_vector<ImageId, 8> images;
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ForEachGPUPage(gpu_addr, size, [this, &images, gpu_addr, size, func](u64 page) {
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const auto it = state->gpu_page_table.find(page);
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if (it == state->gpu_page_table.end()) {
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const auto it = channel_state->gpu_page_table->find(page);
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if (it == channel_state->gpu_page_table->end()) {
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if constexpr (BOOL_BREAK) {
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return false;
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} else {
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@ -1454,8 +1455,9 @@ void TextureCache<P>::RegisterImage(ImageId image_id) {
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}
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image.lru_index = lru_cache.Insert(image_id, frame_tick);
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ForEachGPUPage(image.gpu_addr, image.guest_size_bytes,
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[this, image_id](u64 page) { state->gpu_page_table[page].push_back(image_id); });
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ForEachGPUPage(image.gpu_addr, image.guest_size_bytes, [this, image_id](u64 page) {
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(*channel_state->gpu_page_table)[page].push_back(image_id);
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});
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if (False(image.flags & ImageFlagBits::Sparse)) {
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auto map_id =
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slot_map_views.insert(image.gpu_addr, image.cpu_addr, image.guest_size_bytes, image_id);
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@ -1486,9 +1488,9 @@ void TextureCache<P>::UnregisterImage(ImageId image_id) {
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image.flags &= ~ImageFlagBits::BadOverlap;
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lru_cache.Free(image.lru_index);
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const auto& clear_page_table =
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[this, image_id](
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u64 page,
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std::unordered_map<u64, std::vector<ImageId>, IdentityHash<u64>>& selected_page_table) {
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[this, image_id](u64 page,
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std::unordered_map<u64, std::vector<ImageId>, Common::IdentityHash<u64>>&
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selected_page_table) {
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const auto page_it = selected_page_table.find(page);
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if (page_it == selected_page_table.end()) {
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ASSERT_MSG(false, "Unregistering unregistered page=0x{:x}", page << YUZU_PAGEBITS);
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@ -1504,7 +1506,7 @@ void TextureCache<P>::UnregisterImage(ImageId image_id) {
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image_ids.erase(vector_it);
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};
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ForEachGPUPage(image.gpu_addr, image.guest_size_bytes, [this, &clear_page_table](u64 page) {
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clear_page_table(page, state->gpu_page_table);
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clear_page_table(page, (*channel_state->gpu_page_table));
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});
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if (False(image.flags & ImageFlagBits::Sparse)) {
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const auto map_id = image.map_view_id;
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@ -1701,11 +1703,11 @@ void TextureCache<P>::DeleteImage(ImageId image_id, bool immediate_delete) {
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template <class P>
|
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void TextureCache<P>::RemoveImageViewReferences(std::span<const ImageViewId> removed_views) {
|
||||
auto it = state->image_views.begin();
|
||||
while (it != state->image_views.end()) {
|
||||
auto it = channel_state->image_views.begin();
|
||||
while (it != channel_state->image_views.end()) {
|
||||
const auto found = std::ranges::find(removed_views, it->second);
|
||||
if (found != removed_views.end()) {
|
||||
it = state->image_views.erase(it);
|
||||
it = channel_state->image_views.erase(it);
|
||||
} else {
|
||||
++it;
|
||||
}
|
||||
@ -1967,61 +1969,19 @@ bool TextureCache<P>::IsFullClear(ImageViewId id) {
|
||||
scissor.max_y >= size.height;
|
||||
}
|
||||
|
||||
template <class P>
|
||||
TextureCache<P>::ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& state) noexcept
|
||||
: maxwell3d{*state.maxwell_3d}, kepler_compute{*state.kepler_compute},
|
||||
gpu_memory{*state.memory_manager}, graphics_image_table{gpu_memory},
|
||||
graphics_sampler_table{gpu_memory}, compute_image_table{gpu_memory}, compute_sampler_table{
|
||||
gpu_memory} {}
|
||||
|
||||
template <class P>
|
||||
void TextureCache<P>::CreateChannel(struct Tegra::Control::ChannelState& channel) {
|
||||
ASSERT(channel_map.find(channel.bind_id) == channel_map.end() && channel.bind_id >= 0);
|
||||
auto new_id = [this, &channel]() {
|
||||
if (!free_channel_ids.empty()) {
|
||||
auto id = free_channel_ids.front();
|
||||
free_channel_ids.pop_front();
|
||||
new (&channel_storage[id]) ChannelInfo(channel);
|
||||
return id;
|
||||
}
|
||||
channel_storage.emplace_back(channel);
|
||||
return channel_storage.size() - 1;
|
||||
}();
|
||||
channel_map.emplace(channel.bind_id, new_id);
|
||||
if (current_channel_id != UNSET_CHANNEL) {
|
||||
state = &channel_storage[current_channel_id];
|
||||
}
|
||||
VideoCommon::ChannelSetupCaches<TextureCacheChannelInfo>::CreateChannel(channel);
|
||||
const auto it = channel_map.find(channel.bind_id);
|
||||
auto* this_state = &channel_storage[it->second];
|
||||
const auto& this_as_ref = address_spaces[channel.memory_manager->GetID()];
|
||||
this_state->gpu_page_table = &gpu_page_table_storage[this_as_ref.storage_id];
|
||||
}
|
||||
|
||||
/// Bind a channel for execution.
|
||||
template <class P>
|
||||
void TextureCache<P>::BindToChannel(s32 id) {
|
||||
auto it = channel_map.find(id);
|
||||
ASSERT(it != channel_map.end() && id >= 0);
|
||||
current_channel_id = it->second;
|
||||
state = &channel_storage[current_channel_id];
|
||||
maxwell3d = &state->maxwell3d;
|
||||
kepler_compute = &state->kepler_compute;
|
||||
gpu_memory = &state->gpu_memory;
|
||||
}
|
||||
|
||||
/// Erase channel's state.
|
||||
template <class P>
|
||||
void TextureCache<P>::EraseChannel(s32 id) {
|
||||
const auto it = channel_map.find(id);
|
||||
ASSERT(it != channel_map.end() && id >= 0);
|
||||
const auto this_id = it->second;
|
||||
free_channel_ids.push_back(this_id);
|
||||
channel_map.erase(it);
|
||||
if (this_id == current_channel_id) {
|
||||
current_channel_id = UNSET_CHANNEL;
|
||||
state = nullptr;
|
||||
maxwell3d = nullptr;
|
||||
kepler_compute = nullptr;
|
||||
gpu_memory = nullptr;
|
||||
} else if (current_channel_id != UNSET_CHANNEL) {
|
||||
state = &channel_storage[current_channel_id];
|
||||
}
|
||||
void TextureCache<P>::OnGPUASRegister([[maybe_unused]] size_t map_id) {
|
||||
gpu_page_table_storage.emplace_back();
|
||||
}
|
||||
|
||||
} // namespace VideoCommon
|
||||
|
||||
@ -1,5 +1,7 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
// SPDX-FileCopyrightText: 2021 yuzu emulator team
|
||||
// (https://github.com/skyline-emu/)
|
||||
// SPDX-License-Identifier: GPL-3.0-or-later Licensed under GPLv3
|
||||
// or any later version Refer to the license.txt file included.
|
||||
|
||||
#pragma once
|
||||
|
||||
@ -13,9 +15,11 @@
|
||||
#include <queue>
|
||||
|
||||
#include "common/common_types.h"
|
||||
#include "common/hash.h"
|
||||
#include "common/literals.h"
|
||||
#include "common/lru_cache.h"
|
||||
#include "video_core/compatible_formats.h"
|
||||
#include "video_core/control/channel_state_cache.h"
|
||||
#include "video_core/delayed_destruction_ring.h"
|
||||
#include "video_core/engines/fermi_2d.h"
|
||||
#include "video_core/surface.h"
|
||||
@ -50,8 +54,35 @@ struct ImageViewInOut {
|
||||
ImageViewId id{};
|
||||
};
|
||||
|
||||
using TextureCacheGPUMap = std::unordered_map<u64, std::vector<ImageId>, Common::IdentityHash<u64>>;
|
||||
|
||||
class TextureCacheChannelInfo : public ChannelInfo {
|
||||
public:
|
||||
TextureCacheChannelInfo() = delete;
|
||||
TextureCacheChannelInfo(Tegra::Control::ChannelState& state) noexcept;
|
||||
TextureCacheChannelInfo(const TextureCacheChannelInfo& state) = delete;
|
||||
TextureCacheChannelInfo& operator=(const TextureCacheChannelInfo&) = delete;
|
||||
TextureCacheChannelInfo(TextureCacheChannelInfo&& other) noexcept = default;
|
||||
TextureCacheChannelInfo& operator=(TextureCacheChannelInfo&& other) noexcept = default;
|
||||
|
||||
DescriptorTable<TICEntry> graphics_image_table{gpu_memory};
|
||||
DescriptorTable<TSCEntry> graphics_sampler_table{gpu_memory};
|
||||
std::vector<SamplerId> graphics_sampler_ids;
|
||||
std::vector<ImageViewId> graphics_image_view_ids;
|
||||
|
||||
DescriptorTable<TICEntry> compute_image_table{gpu_memory};
|
||||
DescriptorTable<TSCEntry> compute_sampler_table{gpu_memory};
|
||||
std::vector<SamplerId> compute_sampler_ids;
|
||||
std::vector<ImageViewId> compute_image_view_ids;
|
||||
|
||||
std::unordered_map<TICEntry, ImageViewId> image_views;
|
||||
std::unordered_map<TSCEntry, SamplerId> samplers;
|
||||
|
||||
TextureCacheGPUMap* gpu_page_table;
|
||||
};
|
||||
|
||||
template <class P>
|
||||
class TextureCache {
|
||||
class TextureCache : public VideoCommon::ChannelSetupCaches<TextureCacheChannelInfo> {
|
||||
/// Address shift for caching images into a hash table
|
||||
static constexpr u64 YUZU_PAGEBITS = 20;
|
||||
|
||||
@ -85,13 +116,6 @@ class TextureCache {
|
||||
PixelFormat src_format;
|
||||
};
|
||||
|
||||
template <typename T>
|
||||
struct IdentityHash {
|
||||
[[nodiscard]] size_t operator()(T value) const noexcept {
|
||||
return static_cast<size_t>(value);
|
||||
}
|
||||
};
|
||||
|
||||
public:
|
||||
explicit TextureCache(Runtime&, VideoCore::RasterizerInterface&);
|
||||
|
||||
@ -179,13 +203,7 @@ public:
|
||||
[[nodiscard]] bool IsRescaling(const ImageViewBase& image_view) const noexcept;
|
||||
|
||||
/// Create channel state.
|
||||
void CreateChannel(struct Tegra::Control::ChannelState& channel);
|
||||
|
||||
/// Bind a channel for execution.
|
||||
void BindToChannel(s32 id);
|
||||
|
||||
/// Erase channel's state.
|
||||
void EraseChannel(s32 id);
|
||||
void CreateChannel(Tegra::Control::ChannelState& channel) final override;
|
||||
|
||||
std::mutex mutex;
|
||||
|
||||
@ -221,6 +239,8 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
void OnGPUASRegister(size_t map_id) final override;
|
||||
|
||||
/// Runs the Garbage Collector.
|
||||
void RunGarbageCollector();
|
||||
|
||||
@ -355,51 +375,15 @@ private:
|
||||
|
||||
Runtime& runtime;
|
||||
|
||||
struct ChannelInfo {
|
||||
ChannelInfo() = delete;
|
||||
ChannelInfo(struct Tegra::Control::ChannelState& state) noexcept;
|
||||
ChannelInfo(const ChannelInfo& state) = delete;
|
||||
ChannelInfo& operator=(const ChannelInfo&) = delete;
|
||||
ChannelInfo(ChannelInfo&& other) noexcept = default;
|
||||
ChannelInfo& operator=(ChannelInfo&& other) noexcept = default;
|
||||
|
||||
Tegra::Engines::Maxwell3D& maxwell3d;
|
||||
Tegra::Engines::KeplerCompute& kepler_compute;
|
||||
Tegra::MemoryManager& gpu_memory;
|
||||
|
||||
DescriptorTable<TICEntry> graphics_image_table{gpu_memory};
|
||||
DescriptorTable<TSCEntry> graphics_sampler_table{gpu_memory};
|
||||
std::vector<SamplerId> graphics_sampler_ids;
|
||||
std::vector<ImageViewId> graphics_image_view_ids;
|
||||
|
||||
DescriptorTable<TICEntry> compute_image_table{gpu_memory};
|
||||
DescriptorTable<TSCEntry> compute_sampler_table{gpu_memory};
|
||||
std::vector<SamplerId> compute_sampler_ids;
|
||||
std::vector<ImageViewId> compute_image_view_ids;
|
||||
|
||||
std::unordered_map<TICEntry, ImageViewId> image_views;
|
||||
std::unordered_map<TSCEntry, SamplerId> samplers;
|
||||
|
||||
std::unordered_map<u64, std::vector<ImageId>, IdentityHash<u64>> gpu_page_table;
|
||||
};
|
||||
|
||||
std::deque<ChannelInfo> channel_storage;
|
||||
std::deque<size_t> free_channel_ids;
|
||||
std::unordered_map<s32, size_t> channel_map;
|
||||
|
||||
ChannelInfo* state;
|
||||
size_t current_channel_id{UNSET_CHANNEL};
|
||||
VideoCore::RasterizerInterface& rasterizer;
|
||||
Tegra::Engines::Maxwell3D* maxwell3d;
|
||||
Tegra::Engines::KeplerCompute* kepler_compute;
|
||||
Tegra::MemoryManager* gpu_memory;
|
||||
std::deque<TextureCacheGPUMap> gpu_page_table_storage;
|
||||
|
||||
RenderTargets render_targets;
|
||||
|
||||
std::unordered_map<RenderTargets, FramebufferId> framebuffers;
|
||||
|
||||
std::unordered_map<u64, std::vector<ImageMapId>, IdentityHash<u64>> page_table;
|
||||
std::unordered_map<u64, std::vector<ImageId>, IdentityHash<u64>> sparse_page_table;
|
||||
std::unordered_map<u64, std::vector<ImageMapId>, Common::IdentityHash<u64>> page_table;
|
||||
std::unordered_map<u64, std::vector<ImageId>, Common::IdentityHash<u64>> sparse_page_table;
|
||||
std::unordered_map<ImageId, std::vector<ImageViewId>> sparse_views;
|
||||
|
||||
VAddr virtual_invalid_space{};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user