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Merge pull request #537 from bunnei/misc-shader
gl_shader_decompiler: Additional decodings, remove unused stuff from TEX
This commit is contained in:
commit
03f877919d
@ -390,6 +390,9 @@ class OpCode {
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public:
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public:
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enum class Id {
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enum class Id {
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KIL,
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KIL,
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BFE_C,
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BFE_R,
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BFE_IMM,
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BRA,
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BRA,
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LD_A,
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LD_A,
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LD_C,
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LD_C,
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@ -444,6 +447,9 @@ public:
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FMNMX_C,
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FMNMX_C,
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FMNMX_R,
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FMNMX_R,
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FMNMX_IMM,
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FMNMX_IMM,
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IMNMX_C,
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IMNMX_R,
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IMNMX_IMM,
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FSETP_C, // Set Predicate
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FSETP_C, // Set Predicate
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FSETP_R,
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FSETP_R,
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FSETP_IMM,
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FSETP_IMM,
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@ -454,6 +460,10 @@ public:
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ISETP_IMM,
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ISETP_IMM,
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ISETP_R,
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ISETP_R,
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PSETP,
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PSETP,
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XMAD_IMM,
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XMAD_CR,
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XMAD_RC,
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XMAD_RR,
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};
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};
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enum class Type {
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enum class Type {
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@ -565,6 +575,9 @@ private:
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std::vector<Matcher> table = {
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std::vector<Matcher> table = {
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#define INST(bitstring, op, type, name) Detail::GetMatcher(bitstring, op, type, name)
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#define INST(bitstring, op, type, name) Detail::GetMatcher(bitstring, op, type, name)
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INST("111000110011----", Id::KIL, Type::Flow, "KIL"),
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INST("111000110011----", Id::KIL, Type::Flow, "KIL"),
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INST("0100110000000---", Id::BFE_C, Type::Flow, "BFE_C"),
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INST("0101110000000---", Id::BFE_R, Type::Flow, "BFE_R"),
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INST("0011100-00000---", Id::BFE_IMM, Type::Flow, "BFE_IMM"),
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INST("111000100100----", Id::BRA, Type::Flow, "BRA"),
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INST("111000100100----", Id::BRA, Type::Flow, "BRA"),
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INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
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INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
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INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"),
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INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"),
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@ -606,6 +619,9 @@ private:
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INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"),
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INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"),
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INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"),
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INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"),
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INST("0011100-01100---", Id::FMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"),
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INST("0011100-01100---", Id::FMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"),
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INST("0100110000100---", Id::IMNMX_C, Type::Arithmetic, "FMNMX_IMM"),
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INST("0101110000100---", Id::IMNMX_R, Type::Arithmetic, "FMNMX_IMM"),
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INST("0011100-00100---", Id::IMNMX_IMM, Type::Arithmetic, "FMNMX_IMM"),
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INST("000001----------", Id::LOP32I, Type::Logic, "LOP32I"),
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INST("000001----------", Id::LOP32I, Type::Logic, "LOP32I"),
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INST("0100110001001---", Id::SHL_C, Type::Shift, "SHL_C"),
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INST("0100110001001---", Id::SHL_C, Type::Shift, "SHL_C"),
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INST("0101110001001---", Id::SHL_R, Type::Shift, "SHL_R"),
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INST("0101110001001---", Id::SHL_R, Type::Shift, "SHL_R"),
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@ -629,6 +645,10 @@ private:
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INST("010110110110----", Id::ISETP_R, Type::IntegerSetPredicate, "ISETP_R"),
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INST("010110110110----", Id::ISETP_R, Type::IntegerSetPredicate, "ISETP_R"),
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INST("0011011-0110----", Id::ISETP_IMM, Type::IntegerSetPredicate, "ISETP_IMM"),
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INST("0011011-0110----", Id::ISETP_IMM, Type::IntegerSetPredicate, "ISETP_IMM"),
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INST("0101000010010---", Id::PSETP, Type::PredicateSetPredicate, "PSETP"),
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INST("0101000010010---", Id::PSETP, Type::PredicateSetPredicate, "PSETP"),
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INST("0011011-00------", Id::XMAD_IMM, Type::Arithmetic, "XMAD_IMM"),
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INST("0100111---------", Id::XMAD_CR, Type::Arithmetic, "XMAD_CR"),
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INST("010100010-------", Id::XMAD_RC, Type::Arithmetic, "XMAD_RC"),
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INST("0101101100------", Id::XMAD_RR, Type::Arithmetic, "XMAD_RR"),
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};
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};
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#undef INST
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#undef INST
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std::stable_sort(table.begin(), table.end(), [](const auto& a, const auto& b) {
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std::stable_sort(table.begin(), table.end(), [](const auto& a, const auto& b) {
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@ -1112,13 +1112,11 @@ private:
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break;
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break;
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}
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}
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case OpCode::Type::Memory: {
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case OpCode::Type::Memory: {
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const Attribute::Index attribute = instr.attribute.fmt20.index;
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switch (opcode->GetId()) {
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switch (opcode->GetId()) {
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case OpCode::Id::LD_A: {
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case OpCode::Id::LD_A: {
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ASSERT_MSG(instr.attribute.fmt20.size == 0, "untested");
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ASSERT_MSG(instr.attribute.fmt20.size == 0, "untested");
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regs.SetRegisterToInputAttibute(instr.gpr0, instr.attribute.fmt20.element,
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regs.SetRegisterToInputAttibute(instr.gpr0, instr.attribute.fmt20.element,
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attribute);
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instr.attribute.fmt20.index);
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break;
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break;
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}
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}
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case OpCode::Id::LD_C: {
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case OpCode::Id::LD_C: {
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@ -1150,12 +1148,11 @@ private:
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}
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}
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case OpCode::Id::ST_A: {
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case OpCode::Id::ST_A: {
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ASSERT_MSG(instr.attribute.fmt20.size == 0, "untested");
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ASSERT_MSG(instr.attribute.fmt20.size == 0, "untested");
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regs.SetOutputAttributeToRegister(attribute, instr.attribute.fmt20.element,
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regs.SetOutputAttributeToRegister(instr.attribute.fmt20.index,
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instr.gpr0);
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instr.attribute.fmt20.element, instr.gpr0);
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break;
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break;
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}
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}
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case OpCode::Id::TEX: {
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case OpCode::Id::TEX: {
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ASSERT_MSG(instr.attribute.fmt20.size == 4, "untested");
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const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
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const std::string sampler = GetSampler(instr.sampler);
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const std::string sampler = GetSampler(instr.sampler);
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@ -1168,7 +1165,7 @@ private:
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const std::string texture = "texture(" + sampler + ", coords)";
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const std::string texture = "texture(" + sampler + ", coords)";
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size_t dest_elem{};
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size_t dest_elem{};
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for (size_t elem = 0; elem < instr.attribute.fmt20.size; ++elem) {
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for (size_t elem = 0; elem < 4; ++elem) {
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if (!instr.tex.IsComponentEnabled(elem)) {
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if (!instr.tex.IsComponentEnabled(elem)) {
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// Skip disabled components
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// Skip disabled components
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continue;
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continue;
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@ -1181,7 +1178,6 @@ private:
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break;
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break;
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}
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}
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case OpCode::Id::TEXS: {
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case OpCode::Id::TEXS: {
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ASSERT_MSG(instr.attribute.fmt20.size == 4, "untested");
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const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr20);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr20);
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const std::string sampler = GetSampler(instr.sampler);
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const std::string sampler = GetSampler(instr.sampler);
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