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https://github.com/yuzu-emu/yuzu.git
synced 2024-11-23 21:05:39 +01:00
vulkan/fixed_pipeline_state: Move state out of individual structures
This commit is contained in:
parent
c94b398f14
commit
1a84209418
@ -39,24 +39,7 @@ constexpr std::array POLYGON_OFFSET_ENABLE_LUT = {
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} // Anonymous namespace
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void FixedPipelineState::VertexInput::Fill(const Maxwell& regs) noexcept {
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for (std::size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
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const auto& input = regs.vertex_attrib_format[index];
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auto& attribute = attributes[index];
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attribute.raw = 0;
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attribute.enabled.Assign(input.IsConstant() ? 0 : 1);
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attribute.buffer.Assign(input.buffer);
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attribute.offset.Assign(input.offset);
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attribute.type.Assign(static_cast<u32>(input.type.Value()));
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attribute.size.Assign(static_cast<u32>(input.size.Value()));
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}
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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binding_divisors[index] =
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regs.instanced_arrays.IsInstancingEnabled(index) ? regs.vertex_array[index].divisor : 0;
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}
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}
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void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
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void FixedPipelineState::Fill(const Maxwell& regs) {
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const auto& clip = regs.view_volume_clip_control;
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const std::array enabled_lut = {regs.polygon_offset_point_enable,
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regs.polygon_offset_line_enable,
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@ -76,19 +59,34 @@ void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
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logic_op_enable.Assign(regs.logic_op.enable != 0 ? 1 : 0);
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logic_op.Assign(PackLogicOp(regs.logic_op.operation));
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rasterize_enable.Assign(regs.rasterize_enable != 0 ? 1 : 0);
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std::memcpy(&point_size, ®s.point_size, sizeof(point_size)); // TODO: C++20 std::bit_cast
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}
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void FixedPipelineState::ColorBlending::Fill(const Maxwell& regs) noexcept {
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std::memcpy(&point_size, ®s.point_size, sizeof(point_size)); // TODO: C++20 std::bit_cast
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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binding_divisors[index] =
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regs.instanced_arrays.IsInstancingEnabled(index) ? regs.vertex_array[index].divisor : 0;
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}
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for (std::size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
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const auto& input = regs.vertex_attrib_format[index];
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auto& attribute = attributes[index];
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attribute.raw = 0;
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attribute.enabled.Assign(input.IsConstant() ? 0 : 1);
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attribute.buffer.Assign(input.buffer);
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attribute.offset.Assign(input.offset);
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attribute.type.Assign(static_cast<u32>(input.type.Value()));
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attribute.size.Assign(static_cast<u32>(input.size.Value()));
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}
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for (std::size_t index = 0; index < std::size(attachments); ++index) {
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attachments[index].Fill(regs, index);
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}
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}
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void FixedPipelineState::ViewportSwizzles::Fill(const Maxwell& regs) noexcept {
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const auto& transform = regs.viewport_transform;
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std::transform(transform.begin(), transform.end(), swizzles.begin(),
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std::transform(transform.begin(), transform.end(), viewport_swizzles.begin(),
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[](const auto& viewport) { return static_cast<u16>(viewport.swizzle.raw); });
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dynamic_state.Fill(regs);
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}
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void FixedPipelineState::BlendingAttachment::Fill(const Maxwell& regs, std::size_t index) {
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@ -174,14 +172,6 @@ void FixedPipelineState::DynamicState::Fill(const Maxwell& regs) {
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}
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}
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void FixedPipelineState::Fill(const Maxwell& regs) {
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vertex_input.Fill(regs);
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rasterizer.Fill(regs);
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color_blending.Fill(regs);
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viewport_swizzles.Fill(regs);
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dynamic_state.Fill(regs);
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}
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std::size_t FixedPipelineState::Hash() const noexcept {
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const u64 hash = Common::CityHash64(reinterpret_cast<const char*>(this), sizeof *this);
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return static_cast<std::size_t>(hash);
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@ -89,63 +89,21 @@ struct FixedPipelineState {
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}
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};
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struct VertexInput {
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union Attribute {
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u32 raw;
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BitField<0, 1, u32> enabled;
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BitField<1, 5, u32> buffer;
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BitField<6, 14, u32> offset;
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BitField<20, 3, u32> type;
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BitField<23, 6, u32> size;
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union VertexAttribute {
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u32 raw;
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BitField<0, 1, u32> enabled;
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BitField<1, 5, u32> buffer;
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BitField<6, 14, u32> offset;
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BitField<20, 3, u32> type;
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BitField<23, 6, u32> size;
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constexpr Maxwell::VertexAttribute::Type Type() const noexcept {
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return static_cast<Maxwell::VertexAttribute::Type>(type.Value());
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}
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constexpr Maxwell::VertexAttribute::Type Type() const noexcept {
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return static_cast<Maxwell::VertexAttribute::Type>(type.Value());
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}
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constexpr Maxwell::VertexAttribute::Size Size() const noexcept {
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return static_cast<Maxwell::VertexAttribute::Size>(size.Value());
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}
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};
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std::array<u32, Maxwell::NumVertexArrays> binding_divisors;
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std::array<Attribute, Maxwell::NumVertexAttributes> attributes;
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void Fill(const Maxwell& regs) noexcept;
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};
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struct Rasterizer {
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union {
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u32 raw;
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BitField<0, 1, u32> primitive_restart_enable;
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BitField<1, 1, u32> depth_bias_enable;
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BitField<2, 1, u32> depth_clamp_disabled;
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BitField<3, 1, u32> ndc_minus_one_to_one;
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BitField<4, 2, u32> polygon_mode;
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BitField<6, 5, u32> patch_control_points_minus_one;
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BitField<11, 2, u32> tessellation_primitive;
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BitField<13, 2, u32> tessellation_spacing;
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BitField<15, 1, u32> tessellation_clockwise;
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BitField<16, 1, u32> logic_op_enable;
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BitField<17, 4, u32> logic_op;
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BitField<21, 1, u32> rasterize_enable;
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};
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// TODO(Rodrigo): Move this to push constants
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u32 point_size;
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void Fill(const Maxwell& regs) noexcept;
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};
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struct ColorBlending {
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std::array<BlendingAttachment, Maxwell::NumRenderTargets> attachments;
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void Fill(const Maxwell& regs) noexcept;
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};
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struct ViewportSwizzles {
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std::array<u16, Maxwell::NumViewports> swizzles;
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void Fill(const Maxwell& regs) noexcept;
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constexpr Maxwell::VertexAttribute::Size Size() const noexcept {
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return static_cast<Maxwell::VertexAttribute::Size>(size.Value());
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}
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};
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template <std::size_t Position>
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@ -217,10 +175,26 @@ struct FixedPipelineState {
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}
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};
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VertexInput vertex_input;
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Rasterizer rasterizer;
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ColorBlending color_blending;
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ViewportSwizzles viewport_swizzles;
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union {
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u32 raw;
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BitField<0, 1, u32> primitive_restart_enable;
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BitField<1, 1, u32> depth_bias_enable;
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BitField<2, 1, u32> depth_clamp_disabled;
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BitField<3, 1, u32> ndc_minus_one_to_one;
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BitField<4, 2, u32> polygon_mode;
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BitField<6, 5, u32> patch_control_points_minus_one;
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BitField<11, 2, u32> tessellation_primitive;
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BitField<13, 2, u32> tessellation_spacing;
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BitField<15, 1, u32> tessellation_clockwise;
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BitField<16, 1, u32> logic_op_enable;
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BitField<17, 4, u32> logic_op;
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BitField<21, 1, u32> rasterize_enable;
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};
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u32 point_size;
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std::array<u32, Maxwell::NumVertexArrays> binding_divisors;
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std::array<VertexAttribute, Maxwell::NumVertexAttributes> attributes;
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std::array<BlendingAttachment, Maxwell::NumRenderTargets> attachments;
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std::array<u16, Maxwell::NumViewports> viewport_swizzles;
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DynamicState dynamic_state;
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void Fill(const Maxwell& regs);
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@ -176,20 +176,18 @@ std::vector<vk::ShaderModule> VKGraphicsPipeline::CreateShaderModules(
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vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpass_params,
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const SPIRVProgram& program) const {
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const auto& vi = fixed_state.vertex_input;
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const auto& cd = fixed_state.color_blending;
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const auto& rs = fixed_state.rasterizer;
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const auto& ds = fixed_state.dynamic_state;
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const auto& viewport_swizzles = fixed_state.viewport_swizzles.swizzles;
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const auto& state = fixed_state;
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const auto& dynamic = fixed_state.dynamic_state;
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const auto& viewport_swizzles = fixed_state.viewport_swizzles;
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std::vector<VkVertexInputBindingDescription> vertex_bindings;
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std::vector<VkVertexInputBindingDivisorDescriptionEXT> vertex_binding_divisors;
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const auto& binding = ds.vertex_bindings[index];
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const auto& binding = dynamic.vertex_bindings[index];
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if (!binding.enabled) {
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continue;
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}
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const bool instanced = vi.binding_divisors[index] != 0;
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const bool instanced = state.binding_divisors[index] != 0;
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const auto rate = instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX;
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auto& vertex_binding = vertex_bindings.emplace_back();
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@ -200,14 +198,14 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
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if (instanced) {
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auto& binding_divisor = vertex_binding_divisors.emplace_back();
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binding_divisor.binding = static_cast<u32>(index);
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binding_divisor.divisor = vi.binding_divisors[index];
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binding_divisor.divisor = state.binding_divisors[index];
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}
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}
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std::vector<VkVertexInputAttributeDescription> vertex_attributes;
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const auto& input_attributes = program[0]->entries.attributes;
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for (std::size_t index = 0; index < std::size(vi.attributes); ++index) {
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const auto& attribute = vi.attributes[index];
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for (std::size_t index = 0; index < state.attributes.size(); ++index) {
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const auto& attribute = state.attributes[index];
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if (!attribute.enabled) {
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continue;
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}
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@ -244,15 +242,15 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
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input_assembly_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO;
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input_assembly_ci.pNext = nullptr;
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input_assembly_ci.flags = 0;
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input_assembly_ci.topology = MaxwellToVK::PrimitiveTopology(device, ds.Topology());
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input_assembly_ci.topology = MaxwellToVK::PrimitiveTopology(device, dynamic.Topology());
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input_assembly_ci.primitiveRestartEnable =
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rs.primitive_restart_enable != 0 && SupportsPrimitiveRestart(input_assembly_ci.topology);
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state.primitive_restart_enable != 0 && SupportsPrimitiveRestart(input_assembly_ci.topology);
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VkPipelineTessellationStateCreateInfo tessellation_ci;
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tessellation_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO;
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tessellation_ci.pNext = nullptr;
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tessellation_ci.flags = 0;
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tessellation_ci.patchControlPoints = rs.patch_control_points_minus_one.Value() + 1;
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tessellation_ci.patchControlPoints = state.patch_control_points_minus_one.Value() + 1;
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VkPipelineViewportStateCreateInfo viewport_ci;
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viewport_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO;
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@ -280,13 +278,13 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
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rasterization_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO;
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rasterization_ci.pNext = nullptr;
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rasterization_ci.flags = 0;
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rasterization_ci.depthClampEnable = rs.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE;
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rasterization_ci.rasterizerDiscardEnable = rs.rasterize_enable == 0 ? VK_TRUE : VK_FALSE;
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rasterization_ci.depthClampEnable = state.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE;
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rasterization_ci.rasterizerDiscardEnable = state.rasterize_enable == 0 ? VK_TRUE : VK_FALSE;
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rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL;
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rasterization_ci.cullMode =
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ds.cull_enable ? MaxwellToVK::CullFace(ds.CullFace()) : VK_CULL_MODE_NONE;
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rasterization_ci.frontFace = MaxwellToVK::FrontFace(ds.FrontFace());
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rasterization_ci.depthBiasEnable = rs.depth_bias_enable;
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dynamic.cull_enable ? MaxwellToVK::CullFace(dynamic.CullFace()) : VK_CULL_MODE_NONE;
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rasterization_ci.frontFace = MaxwellToVK::FrontFace(dynamic.FrontFace());
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rasterization_ci.depthBiasEnable = state.depth_bias_enable;
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rasterization_ci.depthBiasConstantFactor = 0.0f;
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rasterization_ci.depthBiasClamp = 0.0f;
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rasterization_ci.depthBiasSlopeFactor = 0.0f;
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@ -307,14 +305,15 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
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depth_stencil_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO;
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depth_stencil_ci.pNext = nullptr;
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depth_stencil_ci.flags = 0;
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depth_stencil_ci.depthTestEnable = ds.depth_test_enable;
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depth_stencil_ci.depthWriteEnable = ds.depth_write_enable;
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depth_stencil_ci.depthCompareOp =
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ds.depth_test_enable ? MaxwellToVK::ComparisonOp(ds.DepthTestFunc()) : VK_COMPARE_OP_ALWAYS;
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depth_stencil_ci.depthBoundsTestEnable = ds.depth_bounds_enable;
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depth_stencil_ci.stencilTestEnable = ds.stencil_enable;
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depth_stencil_ci.front = GetStencilFaceState(ds.front);
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depth_stencil_ci.back = GetStencilFaceState(ds.back);
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depth_stencil_ci.depthTestEnable = dynamic.depth_test_enable;
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depth_stencil_ci.depthWriteEnable = dynamic.depth_write_enable;
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depth_stencil_ci.depthCompareOp = dynamic.depth_test_enable
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? MaxwellToVK::ComparisonOp(dynamic.DepthTestFunc())
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: VK_COMPARE_OP_ALWAYS;
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depth_stencil_ci.depthBoundsTestEnable = dynamic.depth_bounds_enable;
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depth_stencil_ci.stencilTestEnable = dynamic.stencil_enable;
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depth_stencil_ci.front = GetStencilFaceState(dynamic.front);
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depth_stencil_ci.back = GetStencilFaceState(dynamic.back);
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depth_stencil_ci.minDepthBounds = 0.0f;
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depth_stencil_ci.maxDepthBounds = 0.0f;
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@ -324,7 +323,7 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
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static constexpr std::array COMPONENT_TABLE = {
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VK_COLOR_COMPONENT_R_BIT, VK_COLOR_COMPONENT_G_BIT, VK_COLOR_COMPONENT_B_BIT,
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VK_COLOR_COMPONENT_A_BIT};
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const auto& blend = cd.attachments[index];
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const auto& blend = state.attachments[index];
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VkColorComponentFlags color_components = 0;
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for (std::size_t i = 0; i < COMPONENT_TABLE.size(); ++i) {
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@ -314,16 +314,16 @@ VKPipelineCache::DecompileShaders(const GraphicsPipelineCacheKey& key) {
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Specialization specialization;
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if (fixed_state.dynamic_state.Topology() == Maxwell::PrimitiveTopology::Points) {
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float point_size;
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std::memcpy(&point_size, &fixed_state.rasterizer.point_size, sizeof(float));
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std::memcpy(&point_size, &fixed_state.point_size, sizeof(float));
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specialization.point_size = point_size;
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ASSERT(point_size != 0.0f);
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}
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for (std::size_t i = 0; i < Maxwell::NumVertexAttributes; ++i) {
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const auto& attribute = fixed_state.vertex_input.attributes[i];
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const auto& attribute = fixed_state.attributes[i];
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specialization.enabled_attributes[i] = attribute.enabled.Value() != 0;
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specialization.attribute_types[i] = attribute.Type();
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}
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specialization.ndc_minus_one_to_one = fixed_state.rasterizer.ndc_minus_one_to_one;
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specialization.ndc_minus_one_to_one = fixed_state.ndc_minus_one_to_one;
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SPIRVProgram program;
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std::vector<VkDescriptorSetLayoutBinding> bindings;
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