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https://github.com/yuzu-emu/yuzu.git
synced 2024-11-27 02:14:15 +01:00
vk_pipeline_cache: Use generic shader cache
Trivial port the generic shader cache to Vulkan.
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b96f65b62b
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@ -195,9 +195,9 @@ std::unordered_set<GLenum> GetSupportedFormats() {
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} // Anonymous namespace
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Shader::Shader(std::shared_ptr<VideoCommon::Shader::Registry> registry, ShaderEntries entries,
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ProgramSharedPtr program)
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: registry{std::move(registry)}, entries{std::move(entries)}, program{std::move(program)} {
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Shader::Shader(std::shared_ptr<VideoCommon::Shader::Registry> registry_, ShaderEntries entries_,
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ProgramSharedPtr program_)
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: registry{std::move(registry_)}, entries{std::move(entries_)}, program{std::move(program_)} {
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handle = program->assembly_program.handle;
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if (handle == 0) {
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handle = program->source_program.handle;
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@ -27,6 +27,7 @@
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#include "video_core/renderer_vulkan/wrapper.h"
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#include "video_core/shader/compiler_settings.h"
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#include "video_core/shader/memory_util.h"
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#include "video_core/shader_cache.h"
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namespace Vulkan {
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@ -130,19 +131,18 @@ bool ComputePipelineCacheKey::operator==(const ComputePipelineCacheKey& rhs) con
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return std::memcmp(&rhs, this, sizeof *this) == 0;
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}
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CachedShader::CachedShader(Core::System& system, Tegra::Engines::ShaderType stage,
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GPUVAddr gpu_addr, VAddr cpu_addr, ProgramCode program_code,
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u32 main_offset)
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: RasterizerCacheObject{cpu_addr}, gpu_addr{gpu_addr}, program_code{std::move(program_code)},
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Shader::Shader(Core::System& system, Tegra::Engines::ShaderType stage, GPUVAddr gpu_addr,
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VideoCommon::Shader::ProgramCode program_code, u32 main_offset)
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: gpu_addr{gpu_addr}, program_code{std::move(program_code)},
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registry{stage, GetEngine(system, stage)}, shader_ir{this->program_code, main_offset,
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compiler_settings, registry},
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entries{GenerateShaderEntries(shader_ir)} {}
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CachedShader::~CachedShader() = default;
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Shader::~Shader() = default;
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Tegra::Engines::ConstBufferEngineInterface& CachedShader::GetEngine(
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Core::System& system, Tegra::Engines::ShaderType stage) {
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if (stage == Tegra::Engines::ShaderType::Compute) {
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Tegra::Engines::ConstBufferEngineInterface& Shader::GetEngine(Core::System& system,
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Tegra::Engines::ShaderType stage) {
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if (stage == ShaderType::Compute) {
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return system.GPU().KeplerCompute();
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} else {
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return system.GPU().Maxwell3D();
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@ -154,16 +154,16 @@ VKPipelineCache::VKPipelineCache(Core::System& system, RasterizerVulkan& rasteri
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VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue,
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VKRenderPassCache& renderpass_cache)
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: RasterizerCache{rasterizer}, system{system}, device{device}, scheduler{scheduler},
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descriptor_pool{descriptor_pool}, update_descriptor_queue{update_descriptor_queue},
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renderpass_cache{renderpass_cache} {}
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: VideoCommon::ShaderCache<Shader>{rasterizer}, system{system}, device{device},
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scheduler{scheduler}, descriptor_pool{descriptor_pool},
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update_descriptor_queue{update_descriptor_queue}, renderpass_cache{renderpass_cache} {}
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VKPipelineCache::~VKPipelineCache() = default;
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std::array<Shader, Maxwell::MaxShaderProgram> VKPipelineCache::GetShaders() {
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std::array<Shader*, Maxwell::MaxShaderProgram> VKPipelineCache::GetShaders() {
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const auto& gpu = system.GPU().Maxwell3D();
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std::array<Shader, Maxwell::MaxShaderProgram> shaders;
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std::array<Shader*, Maxwell::MaxShaderProgram> shaders{};
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for (std::size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
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const auto program{static_cast<Maxwell::ShaderProgram>(index)};
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@ -176,24 +176,28 @@ std::array<Shader, Maxwell::MaxShaderProgram> VKPipelineCache::GetShaders() {
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const GPUVAddr program_addr{GetShaderAddress(system, program)};
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const std::optional cpu_addr = memory_manager.GpuToCpuAddress(program_addr);
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ASSERT(cpu_addr);
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auto shader = cpu_addr ? TryGet(*cpu_addr) : null_shader;
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if (!shader) {
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Shader* result = cpu_addr ? TryGet(*cpu_addr) : null_shader.get();
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if (!result) {
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const auto host_ptr{memory_manager.GetPointer(program_addr)};
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// No shader found - create a new one
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constexpr u32 stage_offset = STAGE_MAIN_OFFSET;
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const auto stage = static_cast<Tegra::Engines::ShaderType>(index == 0 ? 0 : index - 1);
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const auto stage = static_cast<ShaderType>(index == 0 ? 0 : index - 1);
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ProgramCode code = GetShaderCode(memory_manager, program_addr, host_ptr, false);
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const std::size_t size_in_bytes = code.size() * sizeof(u64);
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auto shader = std::make_unique<Shader>(system, stage, program_addr, std::move(code),
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stage_offset);
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result = shader.get();
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shader = std::make_shared<CachedShader>(system, stage, program_addr, *cpu_addr,
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std::move(code), stage_offset);
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if (cpu_addr) {
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Register(shader);
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Register(std::move(shader), *cpu_addr, size_in_bytes);
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} else {
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null_shader = shader;
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null_shader = std::move(shader);
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}
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}
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shaders[index] = std::move(shader);
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shaders[index] = result;
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}
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return last_shaders = shaders;
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}
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@ -234,19 +238,22 @@ VKComputePipeline& VKPipelineCache::GetComputePipeline(const ComputePipelineCach
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const auto cpu_addr = memory_manager.GpuToCpuAddress(program_addr);
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ASSERT(cpu_addr);
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auto shader = cpu_addr ? TryGet(*cpu_addr) : null_kernel;
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Shader* shader = cpu_addr ? TryGet(*cpu_addr) : null_kernel.get();
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if (!shader) {
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// No shader found - create a new one
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const auto host_ptr = memory_manager.GetPointer(program_addr);
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ProgramCode code = GetShaderCode(memory_manager, program_addr, host_ptr, true);
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shader = std::make_shared<CachedShader>(system, Tegra::Engines::ShaderType::Compute,
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program_addr, *cpu_addr, std::move(code),
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KERNEL_MAIN_OFFSET);
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const std::size_t size_in_bytes = code.size() * sizeof(u64);
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auto shader_info = std::make_unique<Shader>(system, ShaderType::Compute, program_addr,
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std::move(code), KERNEL_MAIN_OFFSET);
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shader = shader_info.get();
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if (cpu_addr) {
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Register(shader);
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Register(std::move(shader_info), *cpu_addr, size_in_bytes);
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} else {
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null_kernel = shader;
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null_kernel = std::move(shader_info);
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}
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}
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@ -262,7 +269,7 @@ VKComputePipeline& VKPipelineCache::GetComputePipeline(const ComputePipelineCach
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return *entry;
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}
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void VKPipelineCache::Unregister(const Shader& shader) {
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void VKPipelineCache::OnShaderRemoval(Shader* shader) {
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bool finished = false;
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const auto Finish = [&] {
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// TODO(Rodrigo): Instead of finishing here, wait for the fences that use this pipeline and
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@ -294,8 +301,6 @@ void VKPipelineCache::Unregister(const Shader& shader) {
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Finish();
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it = compute_cache.erase(it);
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}
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RasterizerCache::Unregister(shader);
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}
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std::pair<SPIRVProgram, std::vector<VkDescriptorSetLayoutBinding>>
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@ -17,7 +17,6 @@
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#include "common/common_types.h"
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#include "video_core/engines/const_buffer_engine_interface.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/rasterizer_cache.h"
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#include "video_core/renderer_vulkan/fixed_pipeline_state.h"
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#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
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#include "video_core/renderer_vulkan/vk_renderpass_cache.h"
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@ -26,6 +25,7 @@
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#include "video_core/shader/memory_util.h"
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#include "video_core/shader/registry.h"
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#include "video_core/shader/shader_ir.h"
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#include "video_core/shader_cache.h"
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namespace Core {
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class System;
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@ -41,8 +41,6 @@ class VKFence;
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class VKScheduler;
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class VKUpdateDescriptorQueue;
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class CachedShader;
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using Shader = std::shared_ptr<CachedShader>;
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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struct GraphicsPipelineCacheKey {
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@ -102,21 +100,16 @@ struct hash<Vulkan::ComputePipelineCacheKey> {
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namespace Vulkan {
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class CachedShader final : public RasterizerCacheObject {
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class Shader {
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public:
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explicit CachedShader(Core::System& system, Tegra::Engines::ShaderType stage, GPUVAddr gpu_addr,
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VAddr cpu_addr, VideoCommon::Shader::ProgramCode program_code,
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u32 main_offset);
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~CachedShader();
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explicit Shader(Core::System& system, Tegra::Engines::ShaderType stage, GPUVAddr gpu_addr,
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VideoCommon::Shader::ProgramCode program_code, u32 main_offset);
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~Shader();
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GPUVAddr GetGpuAddr() const {
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return gpu_addr;
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}
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std::size_t GetSizeInBytes() const override {
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return program_code.size() * sizeof(u64);
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}
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VideoCommon::Shader::ShaderIR& GetIR() {
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return shader_ir;
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}
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@ -144,25 +137,23 @@ private:
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ShaderEntries entries;
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};
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class VKPipelineCache final : public RasterizerCache<Shader> {
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class VKPipelineCache final : public VideoCommon::ShaderCache<Shader> {
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public:
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explicit VKPipelineCache(Core::System& system, RasterizerVulkan& rasterizer,
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const VKDevice& device, VKScheduler& scheduler,
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VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue,
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VKRenderPassCache& renderpass_cache);
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~VKPipelineCache();
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~VKPipelineCache() override;
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std::array<Shader, Maxwell::MaxShaderProgram> GetShaders();
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std::array<Shader*, Maxwell::MaxShaderProgram> GetShaders();
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VKGraphicsPipeline& GetGraphicsPipeline(const GraphicsPipelineCacheKey& key);
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VKComputePipeline& GetComputePipeline(const ComputePipelineCacheKey& key);
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protected:
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void Unregister(const Shader& shader) override;
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void FlushObjectInner(const Shader& object) override {}
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void OnShaderRemoval(Shader* shader) final;
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private:
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std::pair<SPIRVProgram, std::vector<VkDescriptorSetLayoutBinding>> DecompileShaders(
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@ -175,10 +166,10 @@ private:
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VKUpdateDescriptorQueue& update_descriptor_queue;
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VKRenderPassCache& renderpass_cache;
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Shader null_shader{};
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Shader null_kernel{};
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std::unique_ptr<Shader> null_shader;
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std::unique_ptr<Shader> null_kernel;
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std::array<Shader, Maxwell::MaxShaderProgram> last_shaders;
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std::array<Shader*, Maxwell::MaxShaderProgram> last_shaders{};
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GraphicsPipelineCacheKey last_graphics_key;
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VKGraphicsPipeline* last_graphics_pipeline = nullptr;
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@ -38,6 +38,7 @@
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#include "video_core/renderer_vulkan/vk_texture_cache.h"
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#include "video_core/renderer_vulkan/vk_update_descriptor.h"
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#include "video_core/renderer_vulkan/wrapper.h"
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#include "video_core/shader_cache.h"
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namespace Vulkan {
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@ -98,7 +99,7 @@ VkRect2D GetScissorState(const Maxwell& regs, std::size_t index) {
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}
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std::array<GPUVAddr, Maxwell::MaxShaderProgram> GetShaderAddresses(
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const std::array<Shader, Maxwell::MaxShaderProgram>& shaders) {
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const std::array<Shader*, Maxwell::MaxShaderProgram>& shaders) {
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std::array<GPUVAddr, Maxwell::MaxShaderProgram> addresses;
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for (std::size_t i = 0; i < std::size(addresses); ++i) {
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addresses[i] = shaders[i] ? shaders[i]->GetGpuAddr() : 0;
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@ -775,12 +776,12 @@ RasterizerVulkan::DrawParameters RasterizerVulkan::SetupGeometry(FixedPipelineSt
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}
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void RasterizerVulkan::SetupShaderDescriptors(
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const std::array<Shader, Maxwell::MaxShaderProgram>& shaders) {
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const std::array<Shader*, Maxwell::MaxShaderProgram>& shaders) {
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texture_cache.GuardSamplers(true);
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for (std::size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
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// Skip VertexA stage
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const auto& shader = shaders[stage + 1];
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Shader* const shader = shaders[stage + 1];
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if (!shader) {
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continue;
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}
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@ -168,7 +168,7 @@ private:
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bool is_indexed, bool is_instanced);
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/// Setup descriptors in the graphics pipeline.
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void SetupShaderDescriptors(const std::array<Shader, Maxwell::MaxShaderProgram>& shaders);
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void SetupShaderDescriptors(const std::array<Shader*, Maxwell::MaxShaderProgram>& shaders);
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void SetupImageTransitions(Texceptions texceptions,
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const std::array<View, Maxwell::NumRenderTargets>& color_attachments,
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