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Merge pull request #2081 from ReinUsesLisp/lmem-64
shader_ir/memory: Add LD_L 64 bits loads
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commit
72c70d6808
@ -217,9 +217,9 @@ enum class StoreType : u64 {
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Signed8 = 1,
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Signed8 = 1,
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Unsigned16 = 2,
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Unsigned16 = 2,
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Signed16 = 3,
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Signed16 = 3,
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Bytes32 = 4,
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Bits32 = 4,
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Bytes64 = 5,
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Bits64 = 5,
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Bytes128 = 6,
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Bits128 = 6,
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};
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};
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enum class IMinMaxExchange : u64 {
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enum class IMinMaxExchange : u64 {
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@ -104,19 +104,42 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
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}
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}
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case OpCode::Id::LD_L: {
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case OpCode::Id::LD_L: {
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UNIMPLEMENTED_IF_MSG(instr.ld_l.unknown == 1, "LD_L Unhandled mode: {}",
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UNIMPLEMENTED_IF_MSG(instr.ld_l.unknown == 1, "LD_L Unhandled mode: {}",
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static_cast<unsigned>(instr.ld_l.unknown.Value()));
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static_cast<u32>(instr.ld_l.unknown.Value()));
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const Node index = Operation(OperationCode::IAdd, GetRegister(instr.gpr8),
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const auto GetLmem = [&](s32 offset) {
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Immediate(static_cast<s32>(instr.smem_imm)));
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ASSERT(offset % 4 == 0);
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const Node lmem = GetLocalMemory(index);
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const Node immediate_offset = Immediate(static_cast<s32>(instr.smem_imm) + offset);
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const Node address = Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8),
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immediate_offset);
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return GetLocalMemory(address);
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};
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switch (instr.ldst_sl.type.Value()) {
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switch (instr.ldst_sl.type.Value()) {
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case Tegra::Shader::StoreType::Bytes32:
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case Tegra::Shader::StoreType::Bits32:
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SetRegister(bb, instr.gpr0, lmem);
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case Tegra::Shader::StoreType::Bits64:
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case Tegra::Shader::StoreType::Bits128: {
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const u32 count = [&]() {
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switch (instr.ldst_sl.type.Value()) {
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case Tegra::Shader::StoreType::Bits32:
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return 1;
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case Tegra::Shader::StoreType::Bits64:
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return 2;
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case Tegra::Shader::StoreType::Bits128:
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return 4;
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default:
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UNREACHABLE();
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return 0;
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}
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}();
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for (u32 i = 0; i < count; ++i)
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SetTemporal(bb, i, GetLmem(i * 4));
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for (u32 i = 0; i < count; ++i)
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i));
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break;
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break;
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}
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default:
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default:
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UNIMPLEMENTED_MSG("LD_L Unhandled type: {}",
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UNIMPLEMENTED_MSG("LD_L Unhandled type: {}",
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static_cast<unsigned>(instr.ldst_sl.type.Value()));
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static_cast<u32>(instr.ldst_sl.type.Value()));
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}
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}
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break;
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break;
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}
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}
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@ -202,12 +225,20 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
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UNIMPLEMENTED_IF_MSG(instr.st_l.unknown == 0, "ST_L Unhandled mode: {}",
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UNIMPLEMENTED_IF_MSG(instr.st_l.unknown == 0, "ST_L Unhandled mode: {}",
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static_cast<u32>(instr.st_l.unknown.Value()));
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static_cast<u32>(instr.st_l.unknown.Value()));
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const Node index = Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8),
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const auto GetLmemAddr = [&](s32 offset) {
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Immediate(static_cast<s32>(instr.smem_imm)));
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ASSERT(offset % 4 == 0);
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const Node immediate = Immediate(static_cast<s32>(instr.smem_imm) + offset);
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return Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8), immediate);
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};
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switch (instr.ldst_sl.type.Value()) {
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switch (instr.ldst_sl.type.Value()) {
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case Tegra::Shader::StoreType::Bytes32:
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case Tegra::Shader::StoreType::Bits128:
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SetLocalMemory(bb, index, GetRegister(instr.gpr0));
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SetLocalMemory(bb, GetLmemAddr(12), GetRegister(instr.gpr0.Value() + 3));
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SetLocalMemory(bb, GetLmemAddr(8), GetRegister(instr.gpr0.Value() + 2));
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case Tegra::Shader::StoreType::Bits64:
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SetLocalMemory(bb, GetLmemAddr(4), GetRegister(instr.gpr0.Value() + 1));
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case Tegra::Shader::StoreType::Bits32:
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SetLocalMemory(bb, GetLmemAddr(0), GetRegister(instr.gpr0));
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break;
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break;
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default:
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default:
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UNIMPLEMENTED_MSG("ST_L Unhandled type: {}",
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UNIMPLEMENTED_MSG("ST_L Unhandled type: {}",
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