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https://github.com/yuzu-emu/yuzu.git
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Merge pull request #3081 from ReinUsesLisp/fswzadd-shuffles
shader: Implement FSWZADD and reimplement SHFL
This commit is contained in:
commit
b6f6733131
@ -615,6 +615,14 @@ union Instruction {
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BitField<34, 13, u64> mask_imm;
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} shfl;
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union {
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BitField<44, 1, u64> ftz;
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BitField<39, 2, u64> tab5cb8_2;
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BitField<38, 1, u64> ndv;
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BitField<47, 1, u64> cc;
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BitField<28, 8, u64> swizzle;
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} fswzadd;
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union {
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BitField<8, 8, Register> gpr;
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BitField<20, 24, s64> offset;
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@ -1592,6 +1600,7 @@ public:
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DEPBAR,
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VOTE,
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SHFL,
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FSWZADD,
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BFE_C,
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BFE_R,
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BFE_IMM,
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@ -1890,6 +1899,7 @@ private:
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INST("1111000011110---", Id::DEPBAR, Type::Synch, "DEPBAR"),
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INST("0101000011011---", Id::VOTE, Type::Warp, "VOTE"),
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INST("1110111100010---", Id::SHFL, Type::Warp, "SHFL"),
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INST("0101000011111---", Id::FSWZADD, Type::Warp, "FSWZADD"),
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INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
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INST("1110111101001---", Id::LD_S, Type::Memory, "LD_S"),
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INST("1110111101000---", Id::LD_L, Type::Memory, "LD_L"),
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@ -62,6 +62,7 @@ Device::Device() {
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max_varyings = GetInteger<u32>(GL_MAX_VARYING_VECTORS);
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has_warp_intrinsics = GLAD_GL_NV_gpu_shader5 && GLAD_GL_NV_shader_thread_group &&
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GLAD_GL_NV_shader_thread_shuffle;
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has_shader_ballot = GLAD_GL_ARB_shader_ballot;
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has_vertex_viewport_layer = GLAD_GL_ARB_shader_viewport_layer_array;
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has_image_load_formatted = HasExtension(extensions, "GL_EXT_shader_image_load_formatted");
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has_variable_aoffi = TestVariableAoffi();
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@ -79,6 +80,7 @@ Device::Device(std::nullptr_t) {
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max_vertex_attributes = 16;
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max_varyings = 15;
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has_warp_intrinsics = true;
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has_shader_ballot = true;
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has_vertex_viewport_layer = true;
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has_image_load_formatted = true;
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has_variable_aoffi = true;
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@ -34,6 +34,10 @@ public:
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return has_warp_intrinsics;
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}
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bool HasShaderBallot() const {
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return has_shader_ballot;
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}
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bool HasVertexViewportLayer() const {
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return has_vertex_viewport_layer;
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}
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@ -68,6 +72,7 @@ private:
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u32 max_vertex_attributes{};
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u32 max_varyings{};
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bool has_warp_intrinsics{};
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bool has_shader_ballot{};
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bool has_vertex_viewport_layer{};
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bool has_image_load_formatted{};
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bool has_variable_aoffi{};
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@ -275,16 +275,25 @@ CachedProgram BuildShader(const Device& device, u64 unique_identifier, ProgramTy
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std::string source = fmt::format(R"(// {}
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#version 430 core
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#extension GL_ARB_separate_shader_objects : enable
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#extension GL_ARB_shader_viewport_layer_array : enable
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#extension GL_EXT_shader_image_load_formatted : enable
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#extension GL_NV_gpu_shader5 : enable
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#extension GL_NV_shader_thread_group : enable
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#extension GL_NV_shader_thread_shuffle : enable
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)",
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GetShaderId(unique_identifier, program_type));
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if (is_compute) {
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source += "#extension GL_ARB_compute_variable_group_size : require\n";
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}
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if (device.HasShaderBallot()) {
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source += "#extension GL_ARB_shader_ballot : require\n";
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}
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if (device.HasVertexViewportLayer()) {
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source += "#extension GL_ARB_shader_viewport_layer_array : require\n";
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}
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if (device.HasImageLoadFormatted()) {
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source += "#extension GL_EXT_shader_image_load_formatted : require\n";
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}
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if (device.HasWarpIntrinsics()) {
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source += "#extension GL_NV_gpu_shader5 : require\n"
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"#extension GL_NV_shader_thread_group : require\n"
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"#extension GL_NV_shader_thread_shuffle : require\n";
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}
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source += '\n';
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if (!is_compute) {
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@ -1379,6 +1379,26 @@ private:
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return GenerateUnary(operation, "float", Type::Float, type);
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}
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Expression FSwizzleAdd(Operation operation) {
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const std::string op_a = VisitOperand(operation, 0).AsFloat();
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const std::string op_b = VisitOperand(operation, 1).AsFloat();
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if (!device.HasShaderBallot()) {
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LOG_ERROR(Render_OpenGL, "Shader ballot is unavailable but required by the shader");
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return {fmt::format("{} + {}", op_a, op_b), Type::Float};
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}
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const std::string instr_mask = VisitOperand(operation, 2).AsUint();
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const std::string mask = code.GenerateTemporary();
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code.AddLine("uint {} = ({} >> ((gl_SubGroupInvocationARB & 3) << 1)) & 3;", mask,
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instr_mask);
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const std::string modifier_a = fmt::format("fswzadd_modifiers_a[{}]", mask);
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const std::string modifier_b = fmt::format("fswzadd_modifiers_b[{}]", mask);
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return {fmt::format("(({} * {}) + ({} * {}))", op_a, modifier_a, op_b, modifier_b),
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Type::Float};
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}
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Expression ICastFloat(Operation operation) {
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return GenerateUnary(operation, "int", Type::Int, Type::Float);
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}
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@ -1942,34 +1962,24 @@ private:
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return Vote(operation, "allThreadsEqualNV");
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}
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template <const std::string_view& func>
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Expression Shuffle(Operation operation) {
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const std::string value = VisitOperand(operation, 0).AsFloat();
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if (!device.HasWarpIntrinsics()) {
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LOG_ERROR(Render_OpenGL, "Nvidia shuffle intrinsics are required by this shader");
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// On a "single-thread" device we are either on the same thread or out of bounds. Both
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// cases return the passed value.
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return {value, Type::Float};
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Expression ThreadId(Operation operation) {
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if (!device.HasShaderBallot()) {
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LOG_ERROR(Render_OpenGL, "Shader ballot is unavailable but required by the shader");
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return {"0U", Type::Uint};
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}
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return {"gl_SubGroupInvocationARB", Type::Uint};
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}
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Expression ShuffleIndexed(Operation operation) {
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std::string value = VisitOperand(operation, 0).AsFloat();
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if (!device.HasShaderBallot()) {
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LOG_ERROR(Render_OpenGL, "Shader ballot is unavailable but required by the shader");
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return {std::move(value), Type::Float};
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}
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const std::string index = VisitOperand(operation, 1).AsUint();
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const std::string width = VisitOperand(operation, 2).AsUint();
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return {fmt::format("{}({}, {}, {})", func, value, index, width), Type::Float};
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}
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template <const std::string_view& func>
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Expression InRangeShuffle(Operation operation) {
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const std::string index = VisitOperand(operation, 0).AsUint();
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const std::string width = VisitOperand(operation, 1).AsUint();
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if (!device.HasWarpIntrinsics()) {
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// On a "single-thread" device we are only in bounds when the requested index is 0.
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return {fmt::format("({} == 0U)", index), Type::Bool};
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}
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const std::string in_range = code.GenerateTemporary();
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code.AddLine("bool {};", in_range);
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code.AddLine("{}(0U, {}, {}, {});", func, index, width, in_range);
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return {in_range, Type::Bool};
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return {fmt::format("readInvocationARB({}, {})", value, index), Type::Float};
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}
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struct Func final {
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@ -1981,11 +1991,6 @@ private:
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static constexpr std::string_view Or = "Or";
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static constexpr std::string_view Xor = "Xor";
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static constexpr std::string_view Exchange = "Exchange";
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static constexpr std::string_view ShuffleIndexed = "shuffleNV";
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static constexpr std::string_view ShuffleUp = "shuffleUpNV";
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static constexpr std::string_view ShuffleDown = "shuffleDownNV";
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static constexpr std::string_view ShuffleButterfly = "shuffleXorNV";
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};
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static constexpr std::array operation_decompilers = {
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@ -2016,6 +2021,7 @@ private:
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&GLSLDecompiler::FTrunc,
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&GLSLDecompiler::FCastInteger<Type::Int>,
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&GLSLDecompiler::FCastInteger<Type::Uint>,
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&GLSLDecompiler::FSwizzleAdd,
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&GLSLDecompiler::Add<Type::Int>,
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&GLSLDecompiler::Mul<Type::Int>,
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@ -2151,15 +2157,8 @@ private:
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&GLSLDecompiler::VoteAny,
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&GLSLDecompiler::VoteEqual,
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&GLSLDecompiler::Shuffle<Func::ShuffleIndexed>,
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&GLSLDecompiler::Shuffle<Func::ShuffleUp>,
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&GLSLDecompiler::Shuffle<Func::ShuffleDown>,
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&GLSLDecompiler::Shuffle<Func::ShuffleButterfly>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleIndexed>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleUp>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleDown>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleButterfly>,
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&GLSLDecompiler::ThreadId,
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&GLSLDecompiler::ShuffleIndexed,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -2492,6 +2491,9 @@ bvec2 HalfFloatNanComparison(bvec2 comparison, vec2 pair1, vec2 pair2) {
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bvec2 is_nan2 = isnan(pair2);
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return bvec2(comparison.x || is_nan1.x || is_nan2.x, comparison.y || is_nan1.y || is_nan2.y);
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}
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const float fswzadd_modifiers_a[] = float[4](-1.0f, 1.0f, -1.0f, 0.0f );
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const float fswzadd_modifiers_b[] = float[4](-1.0f, -1.0f, 1.0f, -1.0f );
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)";
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}
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@ -783,6 +783,11 @@ private:
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return {};
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}
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Id FSwizzleAdd(Operation operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id HNegate(Operation operation) {
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UNIMPLEMENTED();
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return {};
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@ -1195,46 +1200,16 @@ private:
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return {};
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}
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Id ThreadId(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id ShuffleIndexed(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id ShuffleUp(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id ShuffleDown(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id ShuffleButterfly(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleIndexed(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleUp(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleDown(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleButterfly(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id DeclareBuiltIn(spv::BuiltIn builtin, spv::StorageClass storage, Id type,
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const std::string& name) {
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const Id id = OpVariable(type, storage);
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@ -1393,6 +1368,7 @@ private:
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&SPIRVDecompiler::Unary<&Module::OpTrunc, Type::Float>,
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&SPIRVDecompiler::Unary<&Module::OpConvertSToF, Type::Float, Type::Int>,
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&SPIRVDecompiler::Unary<&Module::OpConvertUToF, Type::Float, Type::Uint>,
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&SPIRVDecompiler::FSwizzleAdd,
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&SPIRVDecompiler::Binary<&Module::OpIAdd, Type::Int>,
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&SPIRVDecompiler::Binary<&Module::OpIMul, Type::Int>,
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@ -1528,15 +1504,8 @@ private:
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&SPIRVDecompiler::VoteAny,
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&SPIRVDecompiler::VoteEqual,
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&SPIRVDecompiler::ThreadId,
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&SPIRVDecompiler::ShuffleIndexed,
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&SPIRVDecompiler::ShuffleUp,
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&SPIRVDecompiler::ShuffleDown,
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&SPIRVDecompiler::ShuffleButterfly,
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&SPIRVDecompiler::InRangeShuffleIndexed,
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&SPIRVDecompiler::InRangeShuffleUp,
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&SPIRVDecompiler::InRangeShuffleDown,
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&SPIRVDecompiler::InRangeShuffleButterfly,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -17,6 +17,7 @@ using Tegra::Shader::ShuffleOperation;
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using Tegra::Shader::VoteOperation;
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namespace {
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OperationCode GetOperationCode(VoteOperation vote_op) {
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switch (vote_op) {
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case VoteOperation::All:
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@ -30,6 +31,7 @@ OperationCode GetOperationCode(VoteOperation vote_op) {
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return OperationCode::VoteAll;
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}
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}
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} // Anonymous namespace
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u32 ShaderIR::DecodeWarp(NodeBlock& bb, u32 pc) {
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@ -46,50 +48,59 @@ u32 ShaderIR::DecodeWarp(NodeBlock& bb, u32 pc) {
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break;
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}
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case OpCode::Id::SHFL: {
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Node width = [this, instr] {
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Node mask = instr.shfl.is_mask_imm ? Immediate(static_cast<u32>(instr.shfl.mask_imm))
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: GetRegister(instr.gpr39);
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// Convert the obscure SHFL mask back into GL_NV_shader_thread_shuffle's width. This has
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// been done reversing Nvidia's math. It won't work on all cases due to SHFL having
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// different parameters that don't properly map to GLSL's interface, but it should work
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// for cases emitted by Nvidia's compiler.
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if (instr.shfl.operation == ShuffleOperation::Up) {
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return Operation(
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OperationCode::ILogicalShiftRight,
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Operation(OperationCode::IAdd, std::move(mask), Immediate(-0x2000)),
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Immediate(8));
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} else {
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return Operation(OperationCode::ILogicalShiftRight,
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Operation(OperationCode::IAdd, Immediate(0x201F),
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Operation(OperationCode::INegate, std::move(mask))),
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Immediate(8));
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}
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}();
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const auto [operation, in_range] = [instr]() -> std::pair<OperationCode, OperationCode> {
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switch (instr.shfl.operation) {
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case ShuffleOperation::Idx:
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return {OperationCode::ShuffleIndexed, OperationCode::InRangeShuffleIndexed};
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case ShuffleOperation::Up:
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return {OperationCode::ShuffleUp, OperationCode::InRangeShuffleUp};
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case ShuffleOperation::Down:
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return {OperationCode::ShuffleDown, OperationCode::InRangeShuffleDown};
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case ShuffleOperation::Bfly:
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return {OperationCode::ShuffleButterfly, OperationCode::InRangeShuffleButterfly};
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}
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UNREACHABLE_MSG("Invalid SHFL operation: {}",
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static_cast<u64>(instr.shfl.operation.Value()));
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return {};
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}();
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// Setting the predicate before the register is intentional to avoid overwriting.
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Node mask = instr.shfl.is_mask_imm ? Immediate(static_cast<u32>(instr.shfl.mask_imm))
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: GetRegister(instr.gpr39);
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Node index = instr.shfl.is_index_imm ? Immediate(static_cast<u32>(instr.shfl.index_imm))
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: GetRegister(instr.gpr20);
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SetPredicate(bb, instr.shfl.pred48, Operation(in_range, index, width));
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Node thread_id = Operation(OperationCode::ThreadId);
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Node clamp = Operation(OperationCode::IBitwiseAnd, mask, Immediate(0x1FU));
|
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Node seg_mask = BitfieldExtract(mask, 8, 16);
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Node neg_seg_mask = Operation(OperationCode::IBitwiseNot, seg_mask);
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Node min_thread_id = Operation(OperationCode::IBitwiseAnd, thread_id, seg_mask);
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Node max_thread_id = Operation(OperationCode::IBitwiseOr, min_thread_id,
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Operation(OperationCode::IBitwiseAnd, clamp, neg_seg_mask));
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Node src_thread_id = [instr, index, neg_seg_mask, min_thread_id, thread_id] {
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switch (instr.shfl.operation) {
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case ShuffleOperation::Idx:
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return Operation(OperationCode::IBitwiseOr,
|
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Operation(OperationCode::IBitwiseAnd, index, neg_seg_mask),
|
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min_thread_id);
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case ShuffleOperation::Down:
|
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return Operation(OperationCode::IAdd, thread_id, index);
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case ShuffleOperation::Up:
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return Operation(OperationCode::IAdd, thread_id,
|
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Operation(OperationCode::INegate, index));
|
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case ShuffleOperation::Bfly:
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return Operation(OperationCode::IBitwiseXor, thread_id, index);
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}
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UNREACHABLE();
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return Immediate(0U);
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}();
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Node in_bounds = [instr, src_thread_id, min_thread_id, max_thread_id] {
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if (instr.shfl.operation == ShuffleOperation::Up) {
|
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return Operation(OperationCode::LogicalIGreaterEqual, src_thread_id, min_thread_id);
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} else {
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return Operation(OperationCode::LogicalILessEqual, src_thread_id, max_thread_id);
|
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}
|
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}();
|
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SetPredicate(bb, instr.shfl.pred48, in_bounds);
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SetRegister(
|
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bb, instr.gpr0,
|
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Operation(operation, GetRegister(instr.gpr8), std::move(index), std::move(width)));
|
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Operation(OperationCode::ShuffleIndexed, GetRegister(instr.gpr8), src_thread_id));
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break;
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}
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case OpCode::Id::FSWZADD: {
|
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UNIMPLEMENTED_IF(instr.fswzadd.ndv);
|
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|
||||
Node op_a = GetRegister(instr.gpr8);
|
||||
Node op_b = GetRegister(instr.gpr20);
|
||||
Node mask = Immediate(static_cast<u32>(instr.fswzadd.swizzle));
|
||||
SetRegister(bb, instr.gpr0, Operation(OperationCode::FSwizzleAdd, op_a, op_b, mask));
|
||||
break;
|
||||
}
|
||||
default:
|
||||
|
@ -47,6 +47,7 @@ enum class OperationCode {
|
||||
FTrunc, /// (MetaArithmetic, float a) -> float
|
||||
FCastInteger, /// (MetaArithmetic, int a) -> float
|
||||
FCastUInteger, /// (MetaArithmetic, uint a) -> float
|
||||
FSwizzleAdd, /// (float a, float b, uint mask) -> float
|
||||
|
||||
IAdd, /// (MetaArithmetic, int a, int b) -> int
|
||||
IMul, /// (MetaArithmetic, int a, int b) -> int
|
||||
@ -181,15 +182,8 @@ enum class OperationCode {
|
||||
VoteAny, /// (bool) -> bool
|
||||
VoteEqual, /// (bool) -> bool
|
||||
|
||||
ShuffleIndexed, /// (uint value, uint index, uint width) -> uint
|
||||
ShuffleUp, /// (uint value, uint index, uint width) -> uint
|
||||
ShuffleDown, /// (uint value, uint index, uint width) -> uint
|
||||
ShuffleButterfly, /// (uint value, uint index, uint width) -> uint
|
||||
|
||||
InRangeShuffleIndexed, /// (uint index, uint width) -> bool
|
||||
InRangeShuffleUp, /// (uint index, uint width) -> bool
|
||||
InRangeShuffleDown, /// (uint index, uint width) -> bool
|
||||
InRangeShuffleButterfly, /// (uint index, uint width) -> bool
|
||||
ThreadId, /// () -> uint
|
||||
ShuffleIndexed, /// (uint value, uint index) -> uint
|
||||
|
||||
Amount,
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user