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Merge pull request #3505 from namkazt/patch-8
shader_decode: implement XMAD mode CSfu
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commit
bdddbe2daa
@ -12,6 +12,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::PredCondition;
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u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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@ -63,15 +64,18 @@ u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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}
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}();
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op_a = BitfieldExtract(op_a, instr.xmad.high_a ? 16 : 0, 16);
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op_a = SignedOperation(OperationCode::IBitfieldExtract, is_signed_a, std::move(op_a),
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instr.xmad.high_a ? Immediate(16) : Immediate(0), Immediate(16));
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const Node original_b = op_b;
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op_b = BitfieldExtract(op_b, is_high_b ? 16 : 0, 16);
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op_b = SignedOperation(OperationCode::IBitfieldExtract, is_signed_b, std::move(op_b),
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is_high_b ? Immediate(16) : Immediate(0), Immediate(16));
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// TODO(Rodrigo): Use an appropiate sign for this operation
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Node product = Operation(OperationCode::IMul, NO_PRECISE, op_a, op_b);
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// we already check sign_a and sign_b is difference or not before so just use one in here.
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Node product = SignedOperation(OperationCode::IMul, is_signed_a, op_a, op_b);
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if (is_psl) {
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product = Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, product, Immediate(16));
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product =
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SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_a, product, Immediate(16));
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}
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SetTemporary(bb, 0, product);
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product = GetTemporary(0);
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@ -88,12 +92,40 @@ u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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return BitfieldExtract(original_c, 16, 16);
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case Tegra::Shader::XmadMode::CBcc: {
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const Node shifted_b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b,
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NO_PRECISE, original_b, Immediate(16));
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return SignedOperation(OperationCode::IAdd, is_signed_c, NO_PRECISE, original_c,
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shifted_b);
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original_b, Immediate(16));
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return SignedOperation(OperationCode::IAdd, is_signed_c, original_c, shifted_b);
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}
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case Tegra::Shader::XmadMode::CSfu: {
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const Node comp_a = GetPredicateComparisonInteger(PredCondition::Equal, is_signed_a,
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op_a, Immediate(0));
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const Node comp_b = GetPredicateComparisonInteger(PredCondition::Equal, is_signed_b,
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op_b, Immediate(0));
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const Node comp = Operation(OperationCode::LogicalOr, comp_a, comp_b);
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const Node comp_minus_a = GetPredicateComparisonInteger(
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PredCondition::NotEqual, is_signed_a,
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SignedOperation(OperationCode::IBitwiseAnd, is_signed_a, op_a,
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Immediate(0x80000000)),
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Immediate(0));
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const Node comp_minus_b = GetPredicateComparisonInteger(
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PredCondition::NotEqual, is_signed_b,
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SignedOperation(OperationCode::IBitwiseAnd, is_signed_b, op_b,
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Immediate(0x80000000)),
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Immediate(0));
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Node new_c = Operation(
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OperationCode::Select, comp_minus_a,
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SignedOperation(OperationCode::IAdd, is_signed_c, original_c, Immediate(-65536)),
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original_c);
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new_c = Operation(
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OperationCode::Select, comp_minus_b,
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SignedOperation(OperationCode::IAdd, is_signed_c, new_c, Immediate(-65536)),
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std::move(new_c));
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return Operation(OperationCode::Select, comp, original_c, std::move(new_c));
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled XMAD mode: {}", static_cast<u32>(instr.xmad.mode.Value()));
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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@ -102,18 +134,19 @@ u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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op_c = GetTemporary(1);
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// TODO(Rodrigo): Use an appropiate sign for this operation
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Node sum = Operation(OperationCode::IAdd, product, op_c);
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Node sum = SignedOperation(OperationCode::IAdd, is_signed_a, product, std::move(op_c));
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SetTemporary(bb, 2, sum);
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sum = GetTemporary(2);
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if (is_merge) {
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const Node a = BitfieldExtract(sum, 0, 16);
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const Node b =
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Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, original_b, Immediate(16));
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sum = Operation(OperationCode::IBitwiseOr, NO_PRECISE, a, b);
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const Node a = SignedOperation(OperationCode::IBitfieldExtract, is_signed_a, std::move(sum),
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Immediate(0), Immediate(16));
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const Node b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b, original_b,
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Immediate(16));
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sum = SignedOperation(OperationCode::IBitwiseOr, is_signed_a, a, b);
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}
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SetInternalFlagsFromInteger(bb, sum, instr.generates_cc);
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SetRegister(bb, instr.gpr0, sum);
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SetRegister(bb, instr.gpr0, std::move(sum));
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return pc;
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}
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