Commit Graph

15 Commits

Author SHA1 Message Date
Richard Henderson
611bc4e6db
target/arm: Add ID_ISAR6
This register was added to aa32 state by ARMv8.2.

Backports commit 802abf4024d23e48d45373ac3f2b580124b54b47 from qemu
2018-07-03 05:15:47 -04:00
Richard Henderson
d950e69174
target/arm: Prune a57 features from max
There is no need to re-set these 9 features already
implied by the call to aarch64_a57_initfn.

Backports commit 156a7065365578deb3d63c2b5b69a4b5999a8fcc from qemu
2018-07-03 05:08:47 -04:00
Richard Henderson
a325de6685
target/arm: Implement ARMv8.2-DotProd
We've already added the helpers with an SVE patch, all that remains
is to wire up the aa64 and aa32 translators. Enable the feature
within -cpu max for CONFIG_USER_ONLY.

Backports commit 26c470a7bb4233454137de1062341ad48947f252 from qemu
2018-07-03 04:55:43 -04:00
Richard Henderson
d4a8f1bfcb
target/arm: Enable SVE for aarch64-linux-user
Enable ARM_FEATURE_SVE for the generic "max" cpu.

Backports commit 802ac0e1e956f3b34a7cb0eda4ec28a60aa87a0a from qemu
2018-07-03 04:46:44 -04:00
Richard Henderson
5752b2086b
target/arm: Enable ARM_FEATURE_V8_ATOMICS for user-only
Backports commit ec7f05fae36637d11de272da82ad1e6c233e77d7 from qemu
2018-05-14 08:29:59 -04:00
Peter Maydell
fabd6c7ae8
target/arm: Make 'any' CPU just an alias for 'max'
Now we have a working '-cpu max', the linux-user-only
'any' CPU is pretty much the same thing, so implement it
that way.

For the moment we don't add any of the extra feature bits
to the system-emulation "max", because we don't set the
ID register bits we would need to to advertise those
features as present.

Backports commit a0032cc5427d0d396aa0a9383ad9980533448ea4 from qemu
2018-03-12 10:11:49 -04:00
Peter Maydell
7388fff079
target/arm: Add "-cpu max" support
Add support for "-cpu max" for ARM guests. This CPU type behaves
like "-cpu host" when KVM is enabled, and like a system CPU with
the maximum possible feature set otherwise. (Note that this means
it won't be migratable across versions, as we will likely add
features to it in future.)

Backports commit bab52d4bba3f22921a690a887b4bd0342f2754cd from qemu
2018-03-12 10:11:49 -04:00
Alistair Francis
44d8c38138
target/arm: Add a core count property
The cortex A53 TRM specifies that bits 24 and 25 of the L2CTLR register
specify the number of cores in the processor, not the total number of
cores in the system. To report this correctly on machines with multiple
CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow
the machine to overwrite this value. To do this let's add an optional
property.

Backports commit f9a697112ee64180354f98309a5d6b691cc8699d from qemu
2018-03-12 10:11:48 -04:00
Lioncash
8e161bb723
target/arm: Use the any cpu model instead of cortex-a57
The Cortex-A57 doesn't allow use of v8.1+ architecture instructions
2018-03-12 03:42:57 -04:00
Richard Henderson
81ae246f07
target/arm: Enable ARM_FEATURE_V8_FCMA
Enable it for the "any" CPU used by *-linux-user.

Backports commit e66a67bf28e1b4fce2e3d72a2610dbd48d9d3078 from qemu
2018-03-09 01:12:19 -05:00
Richard Henderson
fc74a022bf
target/arm: Enable ARM_FEATURE_V8_RDM
Enable it for the "any" CPU used by *-linux-user.

Backports commit f5dfc2ecdd48b71900bc50298ad2768d60356e44 from qemu
2018-03-09 00:27:34 -05:00
Peter Maydell
eb4796e965
target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 any CPU
Now we have implemented FP16 we can enable it for the "any" CPU.

Backports commit 969b389ee8ba84bc3f2e7ccfa993679fac410ad2 from qemu
2018-03-08 23:44:02 -05:00
Ard Biesheuvel
f425b6aa81
target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support
Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to
AArch64 user mode emulation.

Backports commit 955f56d44a73d74016b2e71765d984ac7a6db1dc from qemu
2018-03-07 08:58:43 -05:00
Peter Maydell
aca671b3b1
target-arm: Enable EL2 feature bit on A53 and A57
Enable the ARM_FEATURE_EL2 bit on Cortex-A52 and
Cortex-A57, since this is all now sufficiently implemented
to work with the GICv3. We provide the usual CPU property
to disable it for backwards compatibility with the older
virt boards.

In this commit, we disable the EL2 feature on the
virt and ZynpMP boards, so there is no overall effect.
Another commit will expose a board-level property to
allow the user to enable EL2.

Backports commit c25bd18a04c8bd0f19556d719864b7b08528222d from qemu
2018-03-01 23:36:44 -05:00
Thomas Huth
b2f1326437
Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu
2018-03-01 22:50:58 -05:00