Daniel P. Berrangé
3c0bab6b11
docs: split the CODING_STYLE doc into distinct groups
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Backports commit 9f8efa74d3f1cb9ceeee957ee382c2b4feb2ae30 from qemu
2019-11-28 02:54:44 -05:00
Daniel P. Berrangé
1862005570
docs: document use of automatic cleanup functions in glib
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Document the use of g_autofree and g_autoptr in glib for automatic
freeing of memory.
Backports commit 821f2967562a1fdc7e52a644963163e6917c4293 from qemu
2019-11-28 02:54:35 -05:00
Daniel P. Berrangé
e5c17018be
docs: merge HACKING.rst contents into CODING_STYLE.rst
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The split of information between the two docs is rather arbitary and
unclear. It is simpler for contributors if all the information is in
one file.
Backports commit 637f39568fc0bd9848fd9d225d52ab0c4c443ed3 from qemu
2019-11-28 02:54:24 -05:00
Daniel P. Berrangé
d37daf38a8
docs: convert README, CODING_STYLE and HACKING to RST syntax
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Backports commit 336a7451e8803c21a2da6e7d1eca8cfb8e8b219a from qemu
2019-11-28 02:54:16 -05:00
Richard Henderson
654aaf9ebe
target/arm: Inline gen_bx_im into callers
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There are only two remaining uses of gen_bx_im. In each case, we
know the destination mode -- not changing in the case of gen_jmp
or changing in the case of trans_BLX_i. Use this to simplify the
surrounding code.
For trans_BLX_i, use gen_jmp for the actual branch. For gen_jmp,
use gen_set_pc_im to set up the single-step.
Backports commit eac2f39602e0423adf56be410c9a22c31fec9a81 from qemu
2019-11-28 02:54:09 -05:00
Richard Henderson
e61ca839d3
target/arm: Clean up disas_thumb_insn
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Now that everything is converted, remove the rest of
the legacy decode.
Backports commit 0831403b08122b5bf801b0e3469cc63f019f60f0 from qemu
2019-11-28 02:53:59 -05:00
Richard Henderson
a91de478cc
target/arm: Convert T16, long branches
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Backports commit 67b54c554b39fd24f0c3aabc546e83b3082ee7ff from qemu
2019-11-28 02:53:54 -05:00
Richard Henderson
8d2fe3f6db
target/arm: Convert T16, Unconditional branch
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Backports commit 8d4a4dc849a28aded8f335a25b223e8e3391b6f2 from qemu
2019-11-28 02:53:46 -05:00
Richard Henderson
482799d456
target/arm: Convert T16, Unconditional branch
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Backports commit 8d4a4dc849a28aded8f335a25b223e8e3391b6f2 from qemu
2019-11-28 02:53:35 -05:00
Richard Henderson
2bc615157d
target/arm: Convert T16, load (literal)
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Backports commit 46beb58efbb8a2a32f601a041aa22801a3138ece from qemu
2019-11-28 02:53:27 -05:00
Richard Henderson
fad910c50b
target/arm: Convert T16, shift immediate
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Backports commit 151c2f2841b01bf6fef079c9f1db15a86cae8276 from qemu
2019-11-28 02:53:18 -05:00
Richard Henderson
ee96ab9ea9
target/arm: Convert T16, Miscellaneous 16-bit instructions
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Backports commit 43f7e42c7d515f41ff243034f51b28267ae69938 from qemu
2019-11-28 02:53:08 -05:00
Richard Henderson
dec55633dc
target/arm: Convert T16, Conditional branches, Supervisor call
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Backports commit 629fcaa71ca9a5d6695d1664257b6a5327f38bd6 from qemu
2019-11-28 02:53:01 -05:00
Richard Henderson
336d6b3625
target/arm: Convert T16, push and pop
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Backports commit 564b125fb9dec77e5bca9b4590786985ccc3d6cb from qemu
2019-11-28 02:52:44 -05:00
Richard Henderson
25d1de9005
target/arm: Split gen_nop_hint
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Now that all callers pass a constant value, split the switch
statement into the individual trans_* functions.
Backports commit 279de61a21a1622cb875ead82d6e78c989ba2966 from qemu
2019-11-28 02:52:37 -05:00
Richard Henderson
a45db7fcd1
target/arm: Convert T16, nop hints
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Backports commit 56e6250ede81b4e4b4ddb623874d6c3cdad4a96d from qemu
2019-11-28 02:52:29 -05:00
Richard Henderson
676f1c8783
target/arm: Convert T16, Reverse bytes
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Backports commit ae3002b0218a90f2088817c70b35d3832ec91c18 from qemu
2019-11-28 02:52:19 -05:00
Richard Henderson
692ad18e62
target/arm: Convert T16, Change processor state
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Add a check for ARMv6 in trans_CPS. We had this correct in
the T16 path, but had previously forgotten the check on the
A32 and T32 paths.
Backports commit 20556e7bd6111266fbf1d81e4ff7a89bfa5795a7 from qemu
2019-11-28 02:52:13 -05:00
Richard Henderson
cc7d3fe9da
target/arm: Convert T16, extract
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Backports commit e6f69612cc79e2acc05dafda8695f791a916946f from qemu
2019-11-28 02:52:06 -05:00
Richard Henderson
40282af492
target/arm: Convert T16 adjust sp (immediate)
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Backports commit 2e6a646d7b1304d9106baad73c655132e2736c6c from qemu
2019-11-28 02:51:54 -05:00
Richard Henderson
927fb85b51
target/arm: Convert T16 add, compare, move (two high registers)
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Backports commit 90aa042115a0fe39fe4cb3bcae4c4f728e2f3fdb from qemu
2019-11-28 02:51:46 -05:00
Richard Henderson
7ca1b3f817
target/arm: Convert T16 branch and exchange
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Backports commit a0ef07740425b679d010fac7d9954ae003c1b191 from qemu
2019-11-28 02:51:39 -05:00
Richard Henderson
c690f562c4
target/arm: Convert T16 one low register and immediate
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Backports commit 6c6d237a865041972ec5b226657398f3b3018561 from qemu
2019-11-28 02:51:31 -05:00
Richard Henderson
d9184b16a9
target/arm: Convert T16 add/sub (3 low, 2 low and imm)
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Backports commit c4d3095bb62bdac0b4f9cb180bd7aa0b40c2c270 from qemu
2019-11-28 02:51:24 -05:00
Richard Henderson
c52cfb9aa6
target/arm: Convert T16 load/store multiple
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Backports commit 6e8514ba408f3cc758cd47e2da5475d8684507ec from qemu
2019-11-28 02:51:16 -05:00
Richard Henderson
10c8008266
target/arm: Convert T16 add pc/sp (immediate)
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Backports commit 1cb1323433dca657a42483b2291c1ae923a91726 from qemu
2019-11-28 02:51:08 -05:00
Richard Henderson
7f79c0f2a1
target/arm: Convert T16 load/store (immediate offset)
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Backports commit 07afd747f9fdd79fabf3a51416c7d795f873d297 from qemu
2019-11-28 02:51:01 -05:00
Richard Henderson
0ed7d59e35
target/arm: Convert T16 load/store (register offset)
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Backports commit d1d229179c6b011cc3fa124d4b6b649866470530 from qemu
2019-11-28 02:50:48 -05:00
Richard Henderson
e30f636e8a
target/arm: Convert T16 data-processing (two low regs)
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Backports commit 080c4eadcbbaf95a6fcc4668cf16e4580f2bfe11 from qemu
2019-11-28 02:50:40 -05:00
Richard Henderson
0b2f37afaf
target/arm: Add skeleton for T16 decodetree
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Backports commit f97b454e9e7f5d018d34b5ea85a66cff016bd3b7 from qemu
2019-11-28 02:50:27 -05:00
Richard Henderson
19f1da260f
target/arm: Simplify disas_arm_insn
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Fold away all of the cases that now just goto illegal_op,
because all of their internal bits are now in decodetree.
Backports commit 590057d969a54de5d97261701c5702b3bebc9c07 from qemu
2019-11-28 02:50:03 -05:00
Richard Henderson
e402eef2f0
target/arm: Simplify disas_thumb2_insn
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Fold away all of the cases that now just goto illegal_op,
because all of their internal bits are now in decodetree.
Backports commit f843e77144c9334e244a422848177f2fbef5eb05 from qemu
2019-11-28 02:48:20 -05:00
Richard Henderson
1b5c72935d
target/arm: Convert TT
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Backports commit d449f174e820b15ca1a1f5f3ec19999eeb7da14c from qemu
2019-11-28 02:48:06 -05:00
Richard Henderson
0e03a1f59c
target/arm: Convert SG
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Backports commit 35d240acf1b6a89558e74b490feb13267415b236 from qemu
2019-11-28 02:47:57 -05:00
Richard Henderson
0afb6ab7af
target/arm: Convert Table Branch
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Backports commit 808092bbe356eef0897476be50193d0778596877 from qemu
2019-11-28 02:47:48 -05:00
Richard Henderson
e6b4480ca9
target/arm: Convert Unallocated memory hint
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Backports commit 610f4e1764aa2049fa1711893ff62faf777813f3 from qemu
2019-11-28 02:47:41 -05:00
Richard Henderson
4593c67444
target/arm: Convert PLI, PLD, PLDW
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Backports commit beb595f657d615856fee904f1e0f74f5e1e299a3 from qemu
2019-11-28 02:47:33 -05:00
Richard Henderson
5a23a1f020
target/arm: Convert SETEND
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Backports commit 48c04a5dfaf2c08e00b659a22c502ec098999cf1 from qemu
2019-11-28 02:47:26 -05:00
Richard Henderson
55390520d6
target/arm: Convert CPS (privileged)
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Backports commit 52f83b9c68bdde8d3da5f49292d3561bd474651d from qemu
2019-11-28 02:47:19 -05:00
Richard Henderson
15558cfa7e
target/arm: Convert Clear-Exclusive, Barriers
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Backports commit 519b84711ea36bb8a339096e207b6b9b65cd2051 from qemu
2019-11-28 02:47:11 -05:00
Richard Henderson
eff475c9a9
target/arm: Convert RFE and SRS
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Backports commit 885782a78c6d05932c5d8f463dc50fc8312e3eb9 from qemu
2019-11-28 02:47:04 -05:00
Richard Henderson
87ff6a8bdf
target/arm: Convert SVC
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Backports commit 542f5188a14758d64f7504580a9bd3cae973f546 from qemu
2019-11-28 02:46:55 -05:00
Richard Henderson
a119870e57
target/arm: Convert B, BL, BLX (immediate)
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Backports commit 360144f3b99f9a626ffcc6b9d76537e3a3e0e708 from qemu
2019-11-28 02:46:47 -05:00
Richard Henderson
ed9b8ad2ea
target/arm: Diagnose base == pc for LDM/STM
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We have been using store_reg and not store_reg_for_load when writing
back a loaded value into the base register. At first glance this is
incorrect when base == pc, however that case is UNPREDICTABLE.
Backports commit b0e382b8cf365fed8b8c43482029ac7655961a85 from qemu
2019-11-28 02:46:40 -05:00
Richard Henderson
1a0986ee25
target/arm: Diagnose too few registers in list for LDM/STM
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This has been a TODO item for quite a while. The minimum bit
count for A32 and T16 is 1, and for T32 is 2.
Backports commit 4b222545dbf30b60c033e1cd6eddda612575fd8c from qemu
2019-11-28 02:46:33 -05:00
Richard Henderson
fc81b12631
target/arm: Diagnose writeback register in list for LDM for v7
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Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN
value back to the base register. Starting in v7 this is UNPREDICTABLE.
Backports commit 3949f4675d13c587078f8f423845a3a537a22595 from qemu
2019-11-28 02:46:24 -05:00
Richard Henderson
a501800ba6
target/arm: Convert LDM, STM
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This includes a minor bug fix to LDM (user), which requires
bit 21 to be 0, which means no writeback.
Backports commit c5c426d4c680f908a1e262091a17b088b5709200 from qemu
2019-11-28 02:46:04 -05:00
Richard Henderson
e4ca88f9d6
target/arm: Convert MOVW, MOVT
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Backports commit 8f4451274b7010c1f50e0baa5bb608f19f02b90f from qemu
2019-11-28 02:46:04 -05:00
Richard Henderson
b35749e239
target/arm: Convert Signed multiply, signed and unsigned divide
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Backports commit 2c7c4e090409189488149869797da4acf895bad0 from qemu
2019-11-28 02:45:33 -05:00
Richard Henderson
987641cf10
target/arm: Convert packing, unpacking, saturation, and reversal
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Backports commit 46497f6af73bb33c1064d43a28a48cbb4d233a23 from qemu
2019-11-28 02:44:55 -05:00
