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Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, X86)
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Peter Maydell 3df93e463d target/arm: Don't use a TLB for ARMMMUIdx_Stage2 
We define ARMMMUIdx_Stage2 as being an MMU index which uses a QEMU
TLB. However we never actually use the TLB -- all stage 2 lookups
are done by direct calls to get_phys_addr_lpae() followed by a
physical address load via address_space_ld*().

Remove Stage2 from the list of ARM MMU indexes which correspond to
real core MMU indexes, and instead put it in the set of "NOTLB" ARM
MMU indexes.

This allows us to drop NB_MMU_MODES to 11. It also means we can
safely add support for the ARMv8.3-TTS2UXN extension, which adds
permission bits to the stage 2 descriptors which define execute
permission separatel for EL0 and EL1; supporting that while keeping
Stage2 in a QEMU TLB would require us to use separate TLBs for
"Stage2 for an EL0 access" and "Stage2 for an EL1 access", which is a
lot of extra complication given we aren't even using the QEMU TLB.

In the process of updating the comment on our MMU index use,
fix a couple of other minor errors:
* NS EL2 EL2&0 was missing from the list in the comment
* some text hadn't been updated from when we bumped NB_MMU_MODES
above 8

Backports commit bf05340cb655637451162c02dadcd6581a05c02c from qemu
2020-05-07 08:40:06 -04:00
bindings python: handle UC_ERR_TIMEOUT, so sample_x86.py behaves like sample_x86.c 2020-01-14 09:53:10 -05:00
docs docs: we no longer requires python2 in building 2020-01-14 09:07:44 -05:00
include Timeout error (#1173) 2020-01-14 09:42:57 -05:00
msvc msvc: Define CONFIG_TCG 2019-01-30 13:52:30 -05:00
qemu target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-07 08:40:06 -04:00
samples Timeout error (#1173) 2020-01-14 09:42:57 -05:00
tests Tests, fixes on third platform. (#1168) 2020-01-14 09:45:55 -05:00
.appveyor.yml
.gitignore target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
.travis.yml
AUTHORS.TXT
Brewfile
ChangeLog
config.mk
COPYING
COPYING_GLIB
COPYING.LGPL2
CREDITS.TXT Adding Philippe Antoine to CREDITS 2018-10-06 04:50:10 -04:00
install-cmocka-linux.sh
list.c
make.sh remove broken iOS builds (#1109) 2019-08-08 20:09:05 -04:00
Makefile uc: Restore armeb target 2019-04-19 15:29:25 -04:00
msvc.bat
pkgconfig.mk
README.md
uc.c Timeout error (#1173) 2020-01-14 09:42:57 -05:00
windows_export.bat

README.md

Unicorn Engine

Join the chat at https://gitter.im/unicorn-engine/chat

Build Status Build status

Unicorn is a lightweight, multi-platform, multi-architecture CPU emulator framework based on QEMU.

Unicorn offers some unparalleled features:

  • Multi-architecture: ARM, ARM64 (ARMv8), M68K, MIPS, SPARC, and X86 (16, 32, 64-bit)
  • Clean/simple/lightweight/intuitive architecture-neutral API
  • Implemented in pure C language, with bindings for Crystal, Clojure, Visual Basic, Perl, Rust, Ruby, Python, Java, .NET, Go, Delphi/Free Pascal and Haskell.
  • Native support for Windows & *nix (with Mac OSX, Linux, *BSD & Solaris confirmed)
  • High performance via Just-In-Time compilation
  • Support for fine-grained instrumentation at various levels
  • Thread-safety by design
  • Distributed under free software license GPLv2

Further information is available at http://www.unicorn-engine.org

License

This project is released under the GPL license.

Compilation & Docs

See docs/COMPILE.md file for how to compile and install Unicorn.

More documentation is available in docs/README.md.

Contact

Contact us via mailing list, email or twitter for any questions.

Contribute

If you want to contribute, please pick up something from our Github issues.

We also maintain a list of more challenged problems in a TODO list.

CREDITS.TXT records important contributors of our project.