unicorn/qemu/target/riscv
Richard Henderson 8f53f09a05
cpu: Introduce CPUNegativeOffsetState
Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.

Backports commit 5b146dc716cfd247f99556c04e6e46fbd67565a0 from qemu
2019-06-13 15:08:25 -04:00
..
insn_trans target/riscv: Split gen_arith_imm into functional and temp 2019-05-28 19:07:53 -04:00
cpu_bits.h Supply missing header guards 2019-06-12 10:59:10 -04:00
cpu_helper.c target/riscv: Use env_cpu, env_archcpu 2019-06-12 12:06:19 -04:00
cpu_user.h Supply missing header guards 2019-06-12 10:59:10 -04:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 19:35:46 -04:00
cpu.c cpu: Introduce cpu_set_cpustate_pointers 2019-06-12 12:27:16 -04:00
cpu.h cpu: Introduce CPUNegativeOffsetState 2019-06-13 15:08:25 -04:00
csr.c target/riscv: Use env_cpu, env_archcpu 2019-06-12 12:06:19 -04:00
fpu_helper.c
helper.h
insn16-32.decode target/riscv: Split RVC32 and RVC64 insns into separate files 2019-05-28 19:00:23 -04:00
insn16-64.decode target/riscv: Add checks for several RVC reserved operands 2019-05-28 19:20:36 -04:00
insn16.decode target/riscv: Add checks for several RVC reserved operands 2019-05-28 19:20:36 -04:00
insn32-64.decode target/riscv: Convert RV64D insns to decodetree 2019-03-18 16:57:16 -04:00
insn32.decode target/riscv: Name the argument sets for all of insn32 formats 2019-05-28 18:36:53 -04:00
instmap.h Supply missing header guards 2019-06-12 10:59:10 -04:00
Makefile.objs target/riscv: Split RVC32 and RVC64 insns into separate files 2019-05-28 19:00:23 -04:00
op_helper.c target/riscv: Use env_cpu, env_archcpu 2019-06-12 12:06:19 -04:00
pmp.c riscv: pmp: Log pmp access errors as guest errors 2019-03-19 23:45:03 -04:00
pmp.h Clean up ill-advised or unusual header guards 2019-05-14 08:02:53 -04:00
translate.c target/riscv: Split gen_arith_imm into functional and temp 2019-05-28 19:07:53 -04:00
unicorn.c
unicorn.h