unicorn/qemu/target-i386
Peter Maydell a3ab677e63
Switch non-CPU callers from ld/st*_phys to address_space_ld/st*
Switch all the uses of ld/st*_phys to address_space_ld/st*,
except for those cases where the address space is the CPU's
(ie cs->as). This was done with the following script which
generates a Coccinelle patch.

A few over-80-columns lines in the result were rewrapped by
hand where Coccinelle failed to do the wrapping automatically,
as well as one location where it didn't put a line-continuation
'\' when wrapping lines on a change made to a match inside
a macro definition.

===begin===

for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do
cat <<EOF
@ cpu_matches_ld_${FN} @
expression E1,E2;
identifier as;
@@

ld${FN}_phys(E1->as,E2)

@ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @
expression E1,E2;
@@

-ld${FN}_phys(E1,E2)
+address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL)

EOF

done

for FN in b w_le w_be l_le l_be q_le q_be w l q; do
cat <<EOF
@ cpu_matches_st_${FN} @
expression E1,E2,E3;
identifier as;
@@

st${FN}_phys(E1->as,E2,E3)

@ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @
expression E1,E2,E3;
@@

-st${FN}_phys(E1,E2,E3)
+address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL)

EOF

done
===endit===

Backports commit 42874d3a8c6267ff7789a0396843c884b1d0933a from qemu
2018-02-12 19:27:02 -05:00
..
arch_memory_mapping.c Switch non-CPU callers from ld/st*_phys to address_space_ld/st* 2018-02-12 19:27:02 -05:00
bpt_helper.c target-i386: Make check_hw_breakpoints static 2018-02-11 12:28:08 -05:00
cc_helper_template.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
cc_helper.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
cpu-qom.h target-i386: Require APIC ID to be explicitly set before CPU realize 2018-02-12 15:52:53 -05:00
cpu.c target-i386: clear bsp bit when designating bsp 2018-02-12 16:40:35 -05:00
cpu.h target-i386: remove superfluous TARGET_HAS_SMC macro 2018-02-12 16:41:55 -05:00
excp_helper.c
fpu_helper.c cleanup after msvc port 2017-01-22 21:27:17 +08:00
helper.c target-i386: Move breakpoint related functions to new file 2018-02-11 12:25:24 -05:00
helper.h rework code/block tracing 2016-01-22 18:42:27 -08:00
int_helper.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
Makefile.objs target-i386: Move breakpoint related functions to new file 2018-02-11 12:25:24 -05:00
mem_helper.c no more spinlock 2017-01-20 14:57:33 +08:00
misc_helper.c target-i386: Move breakpoint related functions to new file 2018-02-11 12:25:24 -05:00
ops_sse_header.h
ops_sse.h i386: fix signed int overflow in #923 & #924 2017-12-16 10:28:45 +08:00
seg_helper.c x86: fix SS selector in SYSRET 2018-02-12 16:03:43 -05:00
shift_helper_template.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
smm_helper.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
svm_helper.c cleanup after msvc port 2017-01-22 21:27:17 +08:00
svm.h Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
TODO
topology.h platform.h move #3 2017-01-21 00:13:21 +11:00
translate.c target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
unicorn.c target-i386: make xmm_regs 512-bit wide 2018-02-12 12:38:43 -05:00
unicorn.h New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00