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1,755 Commits 7 Branches 6 Tags 35 MiB
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194 Commits

Author SHA1 Message Date
Nguyen Anh Quynh
821245e766 fix MSVC warning 2017-06-16 16:37:33 +07:00
Nguyen Anh Quynh
fe466d003a callback to count number of instructions in uc_emu_start() should be executed first. fix #727 2017-06-16 13:22:38 +08:00
misson20000
3fdb2d2442 add architecture query (#842) 2017-05-21 09:47:02 +08:00
bulaza
4b9efdc986 Adding INSN hook checks for x86 (#833) 
* adding INSN hook checking for x86

* tabs to spaces

* need to return bool not uc_err

* fixed conditional after switching to bool
 2017-05-14 00:16:17 +07:00
Ryan Hileman
b93ca7f565 fix unreachable UAF (fix #758) (#824) 2017-05-08 10:40:34 +08:00
zhangwm
2e973a13f0 arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
Nguyen Anh Quynh
094ca80092 fix conflicts 2017-03-30 12:23:24 +08:00
fG!
1bef32fff6 Fix huge memory leak on uc_mem_protect() (#787) 
A memory region is allocated inside split_region() that was only freed in error case but not on success case, leading to huge memory leak if the region size was significant.
 2017-03-18 09:17:23 +08:00
zhangwm
ccdb0ff523 armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. 2017-03-15 22:25:35 +08:00
zhangwm
d8fe34a2e8 armeb: Add support for ARM big endian. 2017-03-13 22:32:44 +08:00
Nguyen Anh Quynh
c01dcf0a14 fix merge conflicts 2017-03-10 21:04:33 +08:00
Ahmed Samy
02e6c14e12 x86: add MSR API via reg API (#755) 
Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...

So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
	Byte	Value		Size
	0	MSR ID		4
	4       MSR val		8
 2017-02-24 21:37:19 +08:00
Nguyen Anh Quynh
6ea39f7d5a merge msvc with master 2017-02-24 10:39:36 +08:00
radare
8acd6d47c9 Properly honor UNICORN_HAS_ (#757) 
* Properly honor UNICORN_HAS_

* Oops missed that
 2017-02-24 10:00:36 +08:00
vardyh
7f9251511e MSVC port (vardyh) (#746) 
* unicorn: use waitable timer to implement usleep() on Windows

Signed-off-by: vardyh <vardyh.dev@gmail.com>

* atomic: implement barrier() for msvc

Signed-off-by: vardyh <vardyh.dev@gmail.com>
 2017-02-07 21:31:35 +08:00
xorstream
770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
xorstream
b0ae2138fb Merge remote-tracking branch 'unicorn-engine/master' into msvc_native 2017-01-20 22:37:51 +11:00
xorstream
ee294eebb0 Fixed double free in win32 threads and changed free() to g_free(). (#722) 2017-01-20 16:03:35 +08:00
Nguyen Anh Quynh
42771848d6 no more spinlock 2017-01-20 14:57:33 +08:00
xorstream
002151874a Unicorn interface working with test app in 32bit and 64bit builds. 2017-01-20 17:27:22 +11:00
xorstream
1aeaf5c40d This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh
bc569f5a54 rename API uc_mem_free() to uc_free(). see #662 2017-01-10 20:59:14 +08:00
Nguyen Anh Quynh
fdbbdc6216 rename uc_context_free() to uc_mem_free(). see #373 2017-01-09 20:52:14 +08:00
Nguyen Anh Quynh
52cb0ba78e cleanup more synchronization code 2017-01-09 14:05:39 +08:00
Nguyen Anh Quynh
5777c4f3fd Merge branch 'noglib' of https://github.com/unicorn-engine/unicorn into noglib 2016-12-22 12:13:53 +08:00
Nguyen Anh Quynh
93044e39f1 Merge branch 'master' into noglib 2016-12-22 12:13:34 +08:00
Ryan Hileman
19b92a4a7e fix possible segfault in hook del (#691) (#697) 2016-12-22 00:50:40 +08:00
Chris Eagle
fccbcfd4c2 revert to use of g_free to make future qemu integrations easier (#695) 
* revert to use of g_free to make future qemu integrations easier

* bracing
 2016-12-21 22:28:36 +08:00
Chris Eagle
e46545f722 remove glib dependency by provide compatible replacements 2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh
200f0d195e fix some Msys complains 2016-11-04 21:40:35 +08:00
Nguyen Anh Quynh
04b103164d fix Brew installation in issue #663 2016-11-01 20:30:55 +08:00
Nguyen Anh Quynh
8f99d20695 turn cpu_context_size() into static function 2016-10-12 11:05:32 +08:00
Andrew Dutcher
80f35d3b2b remove safety checks, for some reason 2016-10-11 13:07:14 -07:00
Andrew Dutcher
ea54204952 Tweak some names in a few places, encapsulate the uc_context struct to hide it from users for some reason 2016-10-10 14:04:51 -07:00
Andrew Dutcher
1ab2154fe5 Change save/restore API to have explicit alloc/free functions. Python has explicit save/update functions. 2016-10-07 11:39:42 -07:00
Nguyen Anh Quynh
6c54f9ce48 first_cpu is obsolete by recent changes 2016-10-07 10:10:18 +08:00
Nguyen Anh Quynh
73577cbcd1 rename uc_regstate_restore to uc_context_restore, uc_context_save to uc_context_save 2016-10-07 10:03:19 +08:00
Nguyen Anh Quynh
b7cdbe7a88 Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore 2016-10-07 09:57:07 +08:00
danghvu
6aea0aee58 memleak: Add back object release for uc->cpu 2016-10-03 14:21:47 -05:00
Andrew Dutcher
e3b0e52013 Rename save/restore functions to match the style of the rest of the API 2016-09-28 21:21:44 -07:00
Ryan Hileman
cb615fdba7 remove uc->cpus 2016-09-23 07:38:21 -07:00
Andrew Dutcher
20ce432dbc Fix bracket style 2016-09-09 11:55:20 -07:00
Andrew Dutcher
3deb9fdcad Fix save/restore to work while emulation is not active 2016-09-08 14:41:34 -07:00
Andrew Dutcher
0ef2b5fd71 New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00
Ryan Hileman
cc57ba951f convert more allocs to glib 2016-08-11 08:16:14 -07:00
danghvu
bb8f894872 windows: Remove unnecessary mman inclusion (issue #587) 2016-07-11 13:35:49 -05:00
danghvu
117a318188 memleak: missing from refactoring 2016-07-08 12:49:43 -05:00
danghvu
6b9f17f2f7 memleak: refactor unicorn_common.h, move stuff to uc_close 2016-07-08 11:16:23 -05:00
Hoang-Vu Dang
9a2a5b15d8 Rename unhandled CPU exception 2016-07-05 11:10:39 -05:00
Hoang-Vu Dang
9cdca5a32b Unhandled interrupt will halt execution 2016-07-04 17:07:57 -05:00