unicorn/qemu
Maciej W. Rozycki e4ce0e92b1
target-mips: Also apply the CP0.Status mask to MTTC0
Make CP0.Status writes made with the MTTC0 instruction respect this
register's mask just like all the other places. Also preserve the
current values of masked out bits.

Backports commit 1d725ae952a14b30c84b7bc81b218b8ba77dd311 from qemu
2018-02-11 16:48:34 -05:00
..
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs
fpu Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
hw Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
include host-utils: Add revbit functions 2018-02-11 02:57:55 -05:00
qapi This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qobject This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
qom cleanup after msvc port 2017-01-22 21:27:17 +08:00
scripts Save copies of generated qapi files. 2017-01-21 00:30:50 +11:00
target-arm target-arm: Add condexec state to insn_start 2018-02-11 15:13:40 -05:00
target-i386 target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
target-m68k target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
target-mips target-mips: Also apply the CP0.Status mask to MTTC0 2018-02-11 16:48:34 -05:00
target-sparc target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
tcg tcg: Allow extra data to be attached to insn_start 2018-02-11 13:03:51 -05:00
util Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
aarch64.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
aarch64eb.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
accel.c Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
arm.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
armeb.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
CODING_STYLE
configure tcg: Drop ia64 host support 2018-02-04 18:33:02 -05:00
COPYING
COPYING.LIB
cpu-exec.c Only set eip to the instruction pointer after an interrupt if the interrupt was user-generated (#875) 2017-08-29 17:14:36 +07:00
cpus.c
cputlb.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
exec.c fix the last fix that crashes samples 2017-02-24 20:34:52 +08:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
HACKING
header_gen.py target-mips: Fix CP0.Config3.ISAOnExc write accesses 2018-02-11 16:24:19 -05:00
ioport.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
LICENSE
m68k.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
Makefile cleanup qemu/default-configs/ 2017-01-19 14:52:30 +08:00
Makefile.objs cleanup qemu/Makefile.objs 2017-01-21 21:50:12 +08:00
Makefile.target tcg: Move some opcode generation functions out of line 2018-02-09 08:10:00 -05:00
memory_mapping.c
memory.c merge msvc with master 2017-02-24 10:39:36 +08:00
mips64.h target-mips: Fix CP0.Config3.ISAOnExc write accesses 2018-02-11 16:24:19 -05:00
mips64el.h target-mips: Fix CP0.Config3.ISAOnExc write accesses 2018-02-11 16:24:19 -05:00
mips.h target-mips: Fix CP0.Config3.ISAOnExc write accesses 2018-02-11 16:24:19 -05:00
mipsel.h target-mips: Fix CP0.Config3.ISAOnExc write accesses 2018-02-11 16:24:19 -05:00
powerpc.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
qapi-schema.json
qemu-log.c
qemu-timer.c timer is redundant 2017-01-20 16:46:58 +08:00
rules.mak
softmmu_template.h tcg: Add MO_ALIGN, MO_UNALN 2018-02-10 20:18:53 -05:00
sparc64.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
sparc.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00
tcg-runtime.c platform.h move #3 2017-01-21 00:13:21 +11:00
translate-all.c target-mips: Correct MIPS16/microMIPS branch size calculation 2018-02-11 16:09:33 -05:00
translate-all.h
unicorn_common.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
VERSION
vl.c This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
vl.h
x86_64.h tcg: Rename debug_insn_start to insn_start 2018-02-11 12:34:01 -05:00