Commit Graph

3548 Commits

Author SHA1 Message Date
Laurent Vivier
b3c3cf84a5
target-m68k: fix bit operation with immediate value
M680x0 bit operations with an immediate value use 9 bits of the 16bit
value, while coldfire ones use only 8 bits.

Backports commit fe53c2be8c12da345bd788b949e0b2360e4b3db3 from qemu
2018-03-01 19:12:20 -05:00
Richard Henderson
6f5081314b
target-m68k: Implement bfffo
Backports commit a45f1763cc501861ea4f5eed06e6f58aa681a082 from qemu
2018-03-01 19:10:59 -05:00
Richard Henderson
797e5d44e9
target-m68k: Implement bitfield ops for memory
Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-01 19:07:06 -05:00
Richard Henderson
4f481b2c5a
target-m68k: Implement bitfield ops for registers
Backports commit ac815f46a325b5dabe2ebd6561e4244767c0a603 from qemu
2018-03-01 18:58:47 -05:00
Doug Evans
7bd3170ea5
target/i386: Fix bad patch application to translate.c
In commit c52ab08aee6f7d4717fc6b517174043126bd302f,
the patch snippet for the "syscall" insn got applied to "iret".

Backports commit 410e98146ffde201ab4c778823ac8beaa74c4c3f from qemu
2018-03-01 18:52:10 -05:00
Richard Henderson
4bec129626
tcg/i386: Handle ctpop opcode
Backports commit 993508e43e6d180e9ba9b747a9657eac69aec5bb from qemu
2018-03-01 18:49:43 -05:00
Richard Henderson
3a0fba32f3
tcg/ppc: Handle ctpop opcode
Backports commit 33e75fb9c8cc44165c8dad9093762ba728cc7596 from qemu
2018-03-01 18:46:43 -05:00
Richard Henderson
6d4fc1319a
tcg/ppc: Handle ctz and clz opcodes
Backports commit d0b07481fabb4dc4ed05d56d09718758f5f7a136 from qemu
2018-03-01 18:44:54 -05:00
Richard Henderson
ff3512a045
tcg: Use ctpop to generate ctz if needed
Particularly when andc is also available, this is two insns
shorter than using clz to compute ctz.

Backports commit 14e99210f6c6cede461a54b2e0f9b4cd55175f00 from qemu
2018-03-01 18:39:20 -05:00
Richard Henderson
5ca8ac1aeb
qemu/host-utils.h: Reduce the operation count in the fallback ctpop
Backports commit 7bdcecb7b2d79c292d1256f7d6cf0f1da50d381f from qemu
2018-03-01 18:35:51 -05:00
Richard Henderson
8a62878523
target-i386: Use ctpop helper
Backports commit 4885c3c49531995d67e54907d01d5aa1350faaaf from qemu
2018-03-01 18:34:10 -05:00
Richard Henderson
d072ea48e7
target-sparc: Use ctpop helper
Backports commit 08da3180dca8d41881b321d43944d97a838792fa from qemu
2018-03-01 18:28:54 -05:00
Richard Henderson
5f6e7bbdbd
tcg: Add opcode for ctpop
The number of actual invocations of ctpop itself does not warrent
an opcode, but it is very helpful for POWER7 to use in generating
an expansion for ctz.

Backports commit a768e4e99247911f00c5c0267c12d4e207d5f6cc from qemu
2018-03-01 18:26:41 -05:00
Richard Henderson
01b3c6273a
target-arm: Use clrsb helper
Backports commit bc21dbcc1203ae6bb536f832c46a3b5e22a73451 from qemu
2018-03-01 18:16:56 -05:00
Richard Henderson
fff7ca4617
tcg: Add helpers for clrsb
The number of actual invocations does not warrent an opcode,
and the backends generating it. But at least we can eliminate
redundant helpers.

Backports commit 086920c2c8008f125fd38781072fa25c3ad158ea from qemu
2018-03-01 18:14:11 -05:00
Richard Henderson
246d891668
tcg/i386: Handle ctz and clz opcodes
Backports commit bbf25f90ba802a286fd72be9175a860ae5fec726 from qemu
2018-03-01 16:56:08 -05:00
Richard Henderson
73ab332185
tcg/i386: Allow bmi2 shiftx to have non-matching operands
Previously we could not have different constraints for different ISA levels,
which prevented us from eliding the matching constraint for shifts.

We do now have to make sure that the operands match for constant shifts.
We can also handle some small left shifts via lea.

Backports commit 6a5aed4bdc7078838a8098336588d56c9ce09d1d from qemu
2018-03-01 16:45:04 -05:00
Richard Henderson
9e3feebbfb
tcg/i386: Hoist common arguments in tcg_out_op
Backports commit 42d5b514928a8a0d2f55a4c243d1333f9675815b from qemu
2018-03-01 16:42:30 -05:00
Richard Henderson
142ca07077
tcg/i386: Fuly convert tcg_target_op_def
Use a switch instead of searching a table. Share constraints between
32-bit and 64-bit, when at all possible.

Backports commit cd26449a505f808e479af4fdd539e05767e09c06 from qemu
2018-03-01 16:32:31 -05:00
Richard Henderson
54ca83b900
tcg/s390: Handle clz opcode
Backports commit ce411066f4886cf3a4981fc0a070042a221a5fc8 from qemu
2018-03-01 16:24:29 -05:00
Richard Henderson
a90e026c18
tcg/mips: Handle clz opcode
Backports commit 2a1d9d41aedd722d674b2a94d9b7dbea61469cac from qemu
2018-03-01 16:22:52 -05:00
Richard Henderson
303fc987ed
tcg/arm: Handle ctz and clz opcodes
Backports commit cc0fec8a4d2a8546fe236a09bfd80150af9cbe6b from qemu
2018-03-01 16:20:46 -05:00
Richard Henderson
2b87ddda35
tcg/aarch64: Handle ctz and clz opcodes
Backports commit 53c76c19904983d2c81e4f5e77027c241918a479 from qemu
2018-03-01 16:19:34 -05:00
Richard Henderson
22ebc5fcee
target-i386: Use clz and ctz opcodes
Backports commit e5143c90883cd32a432eb793cdcce6bee747834a from qemu
2018-03-01 16:17:42 -05:00
Richard Henderson
9cde8bfc44
target-arm: Use clz opcode
Backports commit 7539a012f614b724426ac9360238f3281d928a3f from qemu
2018-03-01 16:13:26 -05:00
Richard Henderson
9b2752b0a9
target-mips: Use clz opcode
Backports commit 1a0196c5c7f197fad7b079074d587b3204bcfb0f from qemu
2018-03-01 16:08:19 -05:00
Richard Henderson
2cf34e1b55
tcg: Add clz and ctz opcodes
Backports commit 0e28d0063bbd9e59a981ea2d20f82f30c5d956a8 from qemu
2018-03-01 16:04:11 -05:00
Richard Henderson
b4b173615c
tcg: Allow an operand to be matching or a constant
This allows an output operand to match an input operand
only when the input operand needs a register.

Backports commit 17280ff4a5f264e01e55ae514ee6d3586f9577b2 from qemu
2018-03-01 15:49:05 -05:00
Richard Henderson
3f38611159
tcg: Pass the opcode width to target_parse_constraint
This will let us choose how to interpret a given constraint
depending on whether the opcode is 32- or 64-bit. Which will
let us share more constraint combinations between opcodes.

At the same time, change the interface to return the advanced
pointer instead of passing it in/out by reference.

Backports commit 069ea736b50b75fdec99c9b8cc603b97bd98419e from qemu
2018-03-01 15:45:40 -05:00
Richard Henderson
b8c93597b4
tcg: Transition flat op_defs array to a target callback
This will allow the target to tailor the constraints to the
auto-detected ISA extensions.

Backports commit f69d277ece43c42c7ab0144c2ff05ba740f6706b from qemu
2018-03-01 15:40:11 -05:00
Richard Henderson
551ef0a9f7
tcg: Add markup for output requires new register
This is the same concept as, and same markup as, the
early clobber markup in gcc.

Backports commit 82790a870992bd87d5fd9e607f40859dcf4f82ac from qemu
2018-03-01 15:24:58 -05:00
Richard Henderson
199b3859c4
tcg/optimize: Fold movcond 0/1 into setcond
Backports commit 333b21b809fc80ce67c8f6a7d1c7cc66437d9791 from qemu
2018-03-01 14:41:38 -05:00
Richard Henderson
b62743947f
target-mips: Use the new extract op
Use extract for EXT and DEXT.

Backports commit 6eebb7a438236fcf3fdadb013921ac597aaea911 fromq qemu
2018-03-01 14:39:20 -05:00
Richard Henderson
e5acbeb86e
target-i386: Use new deposit and extract ops
A couple of places where it was easy to identify a right-shift
followed by an extract or and-with-immediate, and the obvious
sign-extract from a high byte register.

Backports commit 04fc2f1c8fc030a11e08e81bb926392c0991282a from qemu
2018-03-01 14:38:17 -05:00
Richard Henderson
ce3c153bd8
target-arm: Use new deposit and extract ops
Use the new primitives for UBFX and SBFX.

Backports commits 59a71b4c5b4ef2ef6425b9e21c972dd5bf450275 and 86c9ab277615af4e0389eb80a83073873ff96c86 from qemu
2018-03-01 14:09:17 -05:00
Richard Henderson
f0781470b4
tcg/s390: Support deposit into zero
Since we can no longer use matching constraints, this does
mean we must handle that data movement by hand.

Backports commit 752b1be94757de906b9c24ebc8f5e6aa54b96b23 from qemu
2018-03-01 13:47:20 -05:00
Richard Henderson
a7462cc7bf
tcg/s390: Implement field extraction opcodes
Backports commit b0bf5fe82df93c180f69d439af59f1f546632f13 from qemu
2018-03-01 13:45:33 -05:00
Richard Henderson
ab8871ea82
tcg/s390: Implement field extraction opcodes
Backports commit b0bf5fe82df93c180f69d439af59f1f546632f13 from qemu
2018-03-01 13:43:46 -05:00
Richard Henderson
348802286c
tcg/s390: Expose host facilities to tcg-target.h
This lets us expose facilities to TCG_TARGET_HAS_* defines
directly, rather than hiding behind function calls.

Backports commit b2c98d9d392c87c9b9e975d30f79924719d9cbbe from qemu
2018-03-01 13:43:00 -05:00
Richard Henderson
db41c6f1d0
tcg/ppc: Implement field extraction opcodes
Backports commit c05021c3c8d6c976e4677d3010b9ef01488a4434 from qemu
2018-03-01 13:38:42 -05:00
Richard Henderson
b10a4a9ee6
tcg/mips: Implement field extraction opcodes
Backports commit befbb3ced5869003ee2e806c4f36e306918d2374 from qemu
2018-03-01 13:37:24 -05:00
Richard Henderson
7a7a5c640d
tcg/i386: Implement field extraction opcodes
Backports commit 78fdbfb94616f0391834d2eccabd16ea29e37da5 from qemu
2018-03-01 13:35:41 -05:00
Richard Henderson
cabb6f71a0
tcg/arm: Implement field extraction opcodes
Backports commit ec903af18418e0870af84f6036d7aca1e6a5dc0a from qemu
2018-03-01 13:33:55 -05:00
Richard Henderson
c4f56ec541
tcg/arm: Move isa detection to tcg-target.h
This allows us to use this detection within the TCG_TARGET_HAS_*
macros, instead of requiring a function call into tcg-target.inc.c.

Backports commit 40b2ccb156534f5d5f1d110a6ce008d87ee10af1 from qemu
2018-03-01 13:32:39 -05:00
Richard Henderson
fbea4130fc
tcg/aarch64: Implement field extraction opcodes
Backports commit e2179f94a17bf0933df29ce1b4f6bc93cbe7dbd3 from qemu
2018-03-01 13:30:55 -05:00
Richard Henderson
9f2fcaaf27
tcg: Add deposit_z expander
While we don't require a new opcode, it is handy to have an expander
that knows the first source is zero.

Backports commit 07cc68d52852bf47dea7c402b46ddd28248d4212 from qemu
2018-03-01 13:29:24 -05:00
Richard Henderson
8e0585dcb1
tcg: Add field extraction primitives
Adds tcg_gen_extract_* and tcg_gen_sextract_* for extraction of
fixed position bitfields, much like we already have for deposit.

Backports commit 7ec8bab3deae643b1ce579c2d65a244f30708330 from qemu
2018-03-01 13:21:30 -05:00
Jason Wang
29932d0719
memory: handle alias in memory_region_is_iommu()
Backports commit 12d37882f0c0def5dee1c21be5d8fea9c21baada from qemu
2018-03-01 13:06:18 -05:00
Jason Wang
fdca6292a1
exec: introduce address_space_get_iotlb_entry()
This patch introduces a helper to query the iotlb entry for a
possible iova. This will be used by later device IOTLB API to enable
the capability for a dataplane (e.g vhost) to query the IOTLB.

Backports commit 052c8fa9983f553fdfa0d61034774070dd639c2b from qemu
2018-03-01 13:05:08 -05:00
Richard Henderson
efad2631d2
translate-all: Avoid -Werror=switch-bool
gcc 5.3.0 diagnoses

translate-all.c: In function ‘alloc_code_gen_buffer’:
translate-all.c:756:17: error: switch condition has boolean value
switch (buf2 != MAP_FAILED) {
^

Backports commit f68808c7494b38764e1895a9852b994638b86536 from qemu
2018-03-01 13:01:50 -05:00